This patch implements posix_openpt() and ptsname()
grantpt() and unlockpt() are left in LibC as stubs, as posix_openpt
currently does all of the needed work.
This makes scheduler preemption much cleaner as bsb does not have to
send smp messages to notify other processes about timer interrupt.
Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using
before.
Change Semaphore -> ThreadBlocker
This was not a semaphore, I just named it one because I didn't know
what semaphore was. I have meant to change this sooner, but it was in
no way urgent :D
Implement SMP events. Processors can now be sent SMP events through
IPIs. SMP events can be sent either to a single processor or broadcasted
to every processor.
PageTable::{map_page,map_range,unmap_page,unmap_range}() now send SMP
event to invalidate TLB caches for the changed pages.
Scheduler no longer uses a global run queue. Each processor has its own
scheduler that keeps track of the load on the processor. Once every
second schedulers do load balancing. Schedulers have no access to other
processors' schedulers, they just see approximate loads. If scheduler
decides that it has too much load, it will send a thread to another
processor through a SMP event.
Schedulers are currently run using the timer interrupt on BSB. This
should be not the case, and each processor should use its LAPIC timer
for interrupts. There is no reason to broadcast SMP event to all
processors when BSB gets timer interrupt.
Old scheduler only achieved 20% idle load on qemu. That was probably a
very inefficient implementation. This new scheduler seems to average
around 1% idle load. This is much closer to what I would expect. On my
own laptop idle load seems to be only around 0.5% on each processor.
Also move the spin wait to check for pending IPI sends to the start of
ipi sending function. There is no need to wait for IPI send succeeding
right after it. It is enough to make sure there are not multiple IPIs
being sent at the same time.
This was broken when I added SMP support. This patch makes sse kind of
dumb as it is saved and restored on every interrupt, but now it at least
works properly... I'll have to look into how sse can get optimized
nicely with SMP. Simple way would be pinning each thread to a specific
processor and doing pretty much what I had before, but sse thread saved
in processor rather than static global.
/dev/keyboard and /dev/mouse can be read for events from any attached
keyboard or mouse respectively. This makes device hot-plugging support
pretty much automatic for TTY, GUI, and whatever takes input.
This is kinda hacky, as I had disable the PS/2 initialization so that
usb keyboard gets /dev/keyboard0. I should add device hot plugging
support for TTY and GUI...
PS/2 code is now kind of messed up, but it works. Keyboards and mice are
now an abstract class that is automatically exposed to userspace. This
will make adding USB input much nicer.
realpath is implemented as a syscall. This is not really required but it
was the easiest way to get it working as there is already path
canonicalization at kernel level.
These are pretty much dummy functions in the kernel side. Only case that
is handled is SOL_SOCKET with SO_ERROR. This is hard coded to return no
error. Network stack is currently synchronous, so all errors are already
reported through synchronous network functions.
Inode closing is something that needs a complete rework. Currently all
sockets are closed when close() is called, which leads to connection
closing if you fork()/exec() with socket being marked as CLOEXEC.
Inodes should probably only be closed once they are not referenced
anywhere.
When a unix domain socket is closed and it has a connection to another
socket, it will make the other socket readable and recv will return 0.
This allows detection of socket closing
These can allocate memory that can be shared between processes using
a global key. There is currenly no safety checks meaning anyone can
map any shared memory object just by trying to map every possible key.
Only segment 0 is supported, but devices can now be accessed through
mmio.
Adding more segments would require adding argument to every PCI API so
it is left for later.
This fixes a bug where userspace provided address is not fully mapped
and the kernel tries to read/write it while using PageTable fast page.
In the future userspace input should be copied on syscall entry, so
userspace could not modify the input during syscall. Currently there
is change that userspace input passes kernel syscall validation and
after that userspace could modify the input before the value is
actually used.
Remove tree-like structure from AML. This allows more spec compliant
parsing of named objects inside not yet declared devices.
This also allows AML to be run thread safely. All object adds/removes
are now guarded by a mutex.
This patch implements basic support for power button using ACPI
fixed events. I still need to implement general purpose events
and embedded controller for full power button support.
Now global lock uses the actual global lock. Currenly if no lock
can be acquired, we just panic the kernel so that I remember to
implement it properly once AML is running concurrently.
I had forgotten that Processors used to be a different definition
in AML.
I also implemented reads/writes for FieldElement/IndexFieldElement
that fit in 64 bits. Reads and writes to buffer are still a TODO.
Method invocation is starting to come together. This implemenetation
can interpret some of the qemu's functions to enter ACPI mode.
PCI config space access is currently the one thing is between
entering ACPI mode.
Now AML parsing is actually done while respecting namespaces and
scopes. I implemented the minimal functionality to parse qemu's AML.
Next step is to implement AML interpreting and then we can drop lai
as a dependency.
This implements only parsing for AML in qemu. InvokeMethods are not
parsed since number of arguments to Methods is not yet known.
Parsing AML uses multiple kilobytes of stack space, so I increased
boot stack size by a lot :D
I am not sure where my own AML is going, but this is good start if
I decide to implement full ACPI on my own.
This code is very much just ugly macro expansion.
Qemu has 2 DefPackage elements that I am not able to parse. Package
data ends while there should be still multiple elements.
Current context saving was very hacky and dependant on compiler
behaviour that was not consistent. Now we always use iret for
context saving. This makes everything more clean.
This is achieved by rewriting some inline assembly and changing
ProcessorID to be 32 bit value. For some reason if processor id
is 8 bits gcc runs out of 8 bit registers on i386.
Scheduler now has its own data SchedulerQueue which holds active nad
blocking thread lists. This removes need for BAN/Errors.h and making
current thread separate element instead of iterator into linked list.
This makes it possible to have current_thread on each processor
instead of a global one in Scheduler.
Bananymous