Change Semaphore -> ThreadBlocker
This was not a semaphore, I just named it one because I didn't know
what semaphore was. I have meant to change this sooner, but it was in
no way urgent :D
Implement SMP events. Processors can now be sent SMP events through
IPIs. SMP events can be sent either to a single processor or broadcasted
to every processor.
PageTable::{map_page,map_range,unmap_page,unmap_range}() now send SMP
event to invalidate TLB caches for the changed pages.
Scheduler no longer uses a global run queue. Each processor has its own
scheduler that keeps track of the load on the processor. Once every
second schedulers do load balancing. Schedulers have no access to other
processors' schedulers, they just see approximate loads. If scheduler
decides that it has too much load, it will send a thread to another
processor through a SMP event.
Schedulers are currently run using the timer interrupt on BSB. This
should be not the case, and each processor should use its LAPIC timer
for interrupts. There is no reason to broadcast SMP event to all
processors when BSB gets timer interrupt.
Old scheduler only achieved 20% idle load on qemu. That was probably a
very inefficient implementation. This new scheduler seems to average
around 1% idle load. This is much closer to what I would expect. On my
own laptop idle load seems to be only around 0.5% on each processor.
This is kinda hacky, as I had disable the PS/2 initialization so that
usb keyboard gets /dev/keyboard0. I should add device hot plugging
support for TTY and GUI...
PS/2 code is now kind of messed up, but it works. Keyboards and mice are
now an abstract class that is automatically exposed to userspace. This
will make adding USB input much nicer.
Now files are installed using the install() command instead of manually
copying files to their destinations. This allows automatic recompilation
of headers that did not work previously
These can allocate memory that can be shared between processes using
a global key. There is currenly no safety checks meaning anyone can
map any shared memory object just by trying to map every possible key.
I had forgotten that Processors used to be a different definition
in AML.
I also implemented reads/writes for FieldElement/IndexFieldElement
that fit in 64 bits. Reads and writes to buffer are still a TODO.
Now AML parsing is actually done while respecting namespaces and
scopes. I implemented the minimal functionality to parse qemu's AML.
Next step is to implement AML interpreting and then we can drop lai
as a dependency.
This implements only parsing for AML in qemu. InvokeMethods are not
parsed since number of arguments to Methods is not yet known.
Parsing AML uses multiple kilobytes of stack space, so I increased
boot stack size by a lot :D
I am not sure where my own AML is going, but this is good start if
I decide to implement full ACPI on my own.
This code is very much just ugly macro expansion.
Qemu has 2 DefPackage elements that I am not able to parse. Package
data ends while there should be still multiple elements.
This allows us to allocate processor stacks, and other per processor
structures dynamically in runtime. Giving processor stack to
ap_trampoline feels super hacky, but it works for now.
Bananymous