This patch adds 2 locales, POSIX locale and UTF8 locale.
functions `mbstowcs()` and `strcoll()` use locales to do convertions and
comparison respectively.
If thread was blocked, but had not reached block queue, you might
already get an unblock request which would fail on an assertion.
If blocked thread was load balanced to another processor and unblocked
simultaneously, there was a race condition.
Now ports define some environment variables, and call a unified bash
script that handles configuration, recompilation and installation.
If a port uses non-configure buildsystem, port script can also specify
custom build and install step.
This allows libc to not require __gxx_personality_v0. I can maybe add
C++ back to libc... :D I don't know why I did not research earlier what
this symbols was used for
This makes scheduler preemption much cleaner as bsb does not have to
send smp messages to notify other processes about timer interrupt.
Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using
before.
Change Semaphore -> ThreadBlocker
This was not a semaphore, I just named it one because I didn't know
what semaphore was. I have meant to change this sooner, but it was in
no way urgent :D
Implement SMP events. Processors can now be sent SMP events through
IPIs. SMP events can be sent either to a single processor or broadcasted
to every processor.
PageTable::{map_page,map_range,unmap_page,unmap_range}() now send SMP
event to invalidate TLB caches for the changed pages.
Scheduler no longer uses a global run queue. Each processor has its own
scheduler that keeps track of the load on the processor. Once every
second schedulers do load balancing. Schedulers have no access to other
processors' schedulers, they just see approximate loads. If scheduler
decides that it has too much load, it will send a thread to another
processor through a SMP event.
Schedulers are currently run using the timer interrupt on BSB. This
should be not the case, and each processor should use its LAPIC timer
for interrupts. There is no reason to broadcast SMP event to all
processors when BSB gets timer interrupt.
Old scheduler only achieved 20% idle load on qemu. That was probably a
very inefficient implementation. This new scheduler seems to average
around 1% idle load. This is much closer to what I would expect. On my
own laptop idle load seems to be only around 0.5% on each processor.
Bananymous