Now global lock uses the actual global lock. Currenly if no lock
can be acquired, we just panic the kernel so that I remember to
implement it properly once AML is running concurrently.
I had forgotten that Processors used to be a different definition
in AML.
I also implemented reads/writes for FieldElement/IndexFieldElement
that fit in 64 bits. Reads and writes to buffer are still a TODO.
Method invocation is starting to come together. This implemenetation
can interpret some of the qemu's functions to enter ACPI mode.
PCI config space access is currently the one thing is between
entering ACPI mode.
Now AML parsing is actually done while respecting namespaces and
scopes. I implemented the minimal functionality to parse qemu's AML.
Next step is to implement AML interpreting and then we can drop lai
as a dependency.
This implements only parsing for AML in qemu. InvokeMethods are not
parsed since number of arguments to Methods is not yet known.
Parsing AML uses multiple kilobytes of stack space, so I increased
boot stack size by a lot :D
I am not sure where my own AML is going, but this is good start if
I decide to implement full ACPI on my own.
This code is very much just ugly macro expansion.
Qemu has 2 DefPackage elements that I am not able to parse. Package
data ends while there should be still multiple elements.
This allows signals to be called even if the process does no syscalls
The old scheduler did signal handling but I feel like it should be
enough to handle them only after syscalls and IRQs. ISRs already
handle signals that caused the ISR and there is no other route to
kernel space.
Current context saving was very hacky and dependant on compiler
behaviour that was not consistent. Now we always use iret for
context saving. This makes everything more clean.
This is achieved by rewriting some inline assembly and changing
ProcessorID to be 32 bit value. For some reason if processor id
is 8 bits gcc runs out of 8 bit registers on i386.
