Commit Graph

1021 Commits

Author SHA1 Message Date
Bananymous d2df55b1ac Kernel: Allow booting with multiple processors on i686
Also remove unnecessary ds clearing in x86_64.
2024-04-03 02:30:38 +03:00
Bananymous 0dd74e3c9d Kernel: Implement syscalls for i686 and cleanup x86_64
This actually allows i686 to boot properly!
2024-04-03 02:23:23 +03:00
Bananymous 9e073e9fa0 Kernel: Add offset for interrupt stack in Scheduler::yield()
This allows accessing (garbage) sp and ss in interrupt stack.
2024-04-03 00:45:22 +03:00
Bananymous c95a271821 Kernel: Set ss in i686 tss 2024-04-03 00:43:38 +03:00
Bananymous fe386fa819 Kernel: Implement thread start trampoline for userspace
This is needed on i686 to set segment registers.
2024-04-03 00:42:39 +03:00
Bananymous 4d70322eab Kernel: Save segment registers on all interrupts on i686 2024-04-03 00:41:13 +03:00
Bananymous d9b8391968 Kernel: Fix i686 page table global mappings 2024-04-03 00:40:16 +03:00
Bananymous 2106a9e373 Kernel: Rework scheduler/processor stacks. 2024-04-02 12:34:42 +03:00
Bananymous 5050047cef Kernel: Rewrite whole scheduler
Current context saving was very hacky and dependant on compiler
behaviour that was not consistent. Now we always use iret for
context saving. This makes everything more clean.
2024-03-29 18:02:12 +02:00
Bananymous 1b65f850ee Kernel: Rename thread stacks to more appropriate names 2024-03-27 15:06:24 +02:00
Bananymous 7c2933aae1 Kernel: Fix ISR error code formatting to 32 bit 2024-03-26 21:01:18 +02:00
Bananymous 96babec22a Kernel: Implement Thread trampolines for x86_32 2024-03-26 21:01:18 +02:00
Bananymous c12d1e9bd9 Kernel: Implement PageTable for x86_32
This is mostly copied from x86_64 with necessary modifications
2024-03-26 20:16:20 +02:00
Bananymous 4d1f0e77f2 Kernel: Fix physical address size for x86_32
Having 32 bit address space does not mean physical address space
is also only 32 bits...
2024-03-26 20:16:20 +02:00
Bananymous d7bf34ecd0 Kernel: Write isr handler for x86_32 and cleanup x86_64 2024-03-26 20:16:20 +02:00
Bananymous 1943c3e7a1 Kernel: Unify IDT and GDT code between x86_64 and x86_32
The code is pretty much the same, so there are just couple macros
differiating initialization.
2024-03-26 16:42:02 +02:00
Bananymous af050cc729 Kernel: Fix boot code for x86_32
Boot assembly now initializes processor and jumps to kernel
2024-03-26 13:25:22 +02:00
Bananymous 99e30a4d7d Kernel: Replace i386 with i686
I don't really want to be working with i386 since it doesn't support
compare exchange instruction
2024-03-26 02:48:26 +02:00
Bananymous 93975fdc45 Kernel: Process signal mask is now 2 32 bit values
This allows signal mask to be atomic on 32 bit target
2024-03-26 02:46:51 +02:00
Bananymous fbef90f7cb Kernel/LibC: Write cxx abi with proper locking 2024-03-26 02:28:10 +02:00
Bananymous a9db4dd9a3 Kernel: NVMe Queue max simultaneous commands is dependent on arch
This allows mask to be atomic on 32 bit architectures
2024-03-26 01:45:43 +02:00
Bananymous fc7e96fa66 Kernel: Rewrite i386 boot code + linker script 2024-03-26 00:10:42 +02:00
Bananymous 097d9a6479 Kernel: Implement dummy IDT and GDT for i386 2024-03-26 00:10:42 +02:00
Bananymous 2dd0bfdece Kernel: Make i386 thread tramplines crash 2024-03-26 00:10:42 +02:00
Bananymous 26585bb1d9 Kernel: Implement signal trampoline for i386 2024-03-22 15:41:15 +02:00
Bananymous 0d92719433 Kernel: Remove old i386 spinlock code 2024-03-22 15:41:15 +02:00
Bananymous 1ab2722850 Kernel: Add PageTable stub to progress linking 2024-03-22 15:41:15 +02:00
Bananymous fe17958b9f Kernel: Rename rsp->sp and rip->ip
This makes more sense if we support i386
2024-03-22 15:41:15 +02:00
Bananymous 3e4d410646 Kernel: Fix AHCI device physical address writing on i386 target 2024-03-22 15:41:15 +02:00
Bananymous b5aae34d86 Kernel: Specify template paramenters where they cannot be deduced 2024-03-22 15:41:15 +02:00
Bananymous 7f029b2713 Kernel: Allow Processor compilation for i386 targets
This is achieved by rewriting some inline assembly and changing
ProcessorID to be 32 bit value. For some reason if processor id
is 8 bits gcc runs out of 8 bit registers on i386.
2024-03-22 15:41:15 +02:00
Bananymous 0424082e7b Kernel: Only compile lai for x86_64 targets
I will be dropping lai entirely soon. Once I get to writing AML
interpreter.
2024-03-22 15:41:15 +02:00
Bananymous 2352c86048 Kernel: i386 has 14 indirect blocks in TmpInode instead of 2
This allows keeping size of TmpInodeInfo as 128
2024-03-22 14:01:27 +02:00
Bananymous c0dff5e203 Kernel: Scheduler/Thread add inline assembly for i386 2024-03-22 14:01:27 +02:00
Bananymous d920785256 Kernel: RDRAND on i386 is called twice with 32 bit register 2024-03-22 14:01:27 +02:00
Bananymous 45cea14165 Kernel: Move sys_fork trampolines to kernel/arch/ directory 2024-03-22 12:48:54 +02:00
Bananymous 26ed689d30 Kernel: Remove old GDT, IDT and MMU code from i386
It will be easier to just rewrite them
2024-03-22 12:47:34 +02:00
Bananymous 7ce0370b6a Kernel: Define KERNEL_OFFSET for i386 target 2024-03-22 12:35:49 +02:00
Bananymous aa2e53c4f8 Kernel: E1000 fix physical address on 32 bit target 2024-03-22 12:35:38 +02:00
Bananymous 9ecd156622 Kenrel: Ext2 fix signed-unsigned comparisons 2024-03-22 12:35:29 +02:00
Bananymous 62f6128ba1 Kernel: Cleanup NVMe Queue command submission
There is techically a race condition on thread sleep and checking
done mask. This patch allows read to success even if this race
condition is hit, although the full timeout has to be waited.

This can be fixed in future with some sort of wait queues that
can properly handle this race condition.
2024-03-19 13:01:27 +02:00
Bananymous 9607b4205a Kernel: Fix kernel panic on signal
Signals are now added/handled without Scheduler's lock
2024-03-18 16:05:47 +02:00
Bananymous 090c3c9930 Kernel: NVMe queues now supports upto 64 simultaneous operations 2024-03-15 13:46:35 +02:00
Bananymous 48ea9e1c1d Kernel: PS2Controller uses RecursiveSpinLock so timeouts don't panic 2024-03-15 13:45:44 +02:00
Bananymous 42469b83fe Kernel: kernel panic is now sent to all processors 2024-03-15 13:45:01 +02:00
Bananymous e65bc040af Kernel: Now all active processors are used in scheduling
When a timer reschedule happens, ipi is broadcasted too all
processors for them to perform a reschedule!
2024-03-09 23:53:50 +02:00
Bananymous 89ca4c8a8b Kernel: Implement IPI broadcasting 2024-03-09 23:53:38 +02:00
Bananymous 2323a55517 Kernel: Debug lock is locked while dumping stack trace 2024-03-09 23:52:06 +02:00
Bananymous 45d6caa1d0 Kernel: APs now start their idle threads when scheduler is started 2024-03-09 23:51:40 +02:00
Bananymous 55d2a64f54 Kernel: Map interrupt handlers for all processors
This doesn't mean that processors will actually handle the irqs
2024-03-09 23:50:57 +02:00