2022-11-16 19:49:09 +02:00
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#include <kernel/IDT.h>
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#include <kernel/kmalloc.h>
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#include <kernel/panic.h>
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2022-12-07 02:41:18 +02:00
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#include <kernel/PIC.h>
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2022-11-16 19:49:09 +02:00
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#include <kernel/kprint.h>
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2022-12-07 02:41:18 +02:00
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union GateDescriptor
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{
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struct
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{
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uint16_t offset_lo;
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uint16_t selector;
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uint8_t reserved;
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uint8_t type : 4;
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uint8_t zero : 1;
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uint8_t dpl : 2;
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uint8_t present : 1;
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uint16_t offset_hi;
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};
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struct
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{
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uint32_t low;
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uint32_t high;
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};
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} __attribute__((packed));
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2022-11-16 19:49:09 +02:00
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struct IDTR
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{
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uint16_t size;
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void* offset;
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} __attribute((packed));
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static IDTR s_idtr;
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static GateDescriptor* s_idt;
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2022-12-07 02:41:18 +02:00
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static void (*s_irq_handlers[16])();
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extern "C" void handle_irq();
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extern "C" void handle_irq_common();
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2022-11-16 19:49:09 +02:00
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2022-11-16 20:28:07 +02:00
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#define INTERRUPT_HANDLER(i, msg) \
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static void interrupt ## i () \
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{ \
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uint32_t cr0, cr2, cr3, cr4; \
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asm volatile("movl %%cr0, %%eax":"=a"(cr0)); \
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asm volatile("movl %%cr2, %%eax":"=a"(cr2)); \
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asm volatile("movl %%cr3, %%eax":"=a"(cr3)); \
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asm volatile("movl %%cr4, %%eax":"=a"(cr4)); \
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Kernel::panic(msg ", CR0={} CR2={} CR3={} CR4={}", cr0, cr2, cr3, cr4); \
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2022-11-16 19:49:09 +02:00
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}
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INTERRUPT_HANDLER(0x00, "Divide error")
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INTERRUPT_HANDLER(0x01, "Debug exception")
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INTERRUPT_HANDLER(0x02, "Unknown error")
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INTERRUPT_HANDLER(0x03, "Breakpoint")
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INTERRUPT_HANDLER(0x04, "Overflow")
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INTERRUPT_HANDLER(0x05, "Bounds check")
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INTERRUPT_HANDLER(0x06, "Invalid opcode")
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INTERRUPT_HANDLER(0x07, "Coprocessor not available")
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INTERRUPT_HANDLER(0x08, "Double fault")
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INTERRUPT_HANDLER(0x09, "Coprocessor segment overrun")
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INTERRUPT_HANDLER(0x0a, "Invalid TSS")
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INTERRUPT_HANDLER(0x0b, "Segment not present")
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INTERRUPT_HANDLER(0x0c, "Stack exception")
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INTERRUPT_HANDLER(0x0d, "General protection fault")
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INTERRUPT_HANDLER(0x0e, "Page fault")
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INTERRUPT_HANDLER(0x0f, "Unknown error")
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INTERRUPT_HANDLER(0x10, "Coprocessor error")
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2022-12-07 02:41:18 +02:00
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#define REGISTER_HANDLER(i) register_interrupt_handler(i, interrupt ## i)
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2022-11-16 19:49:09 +02:00
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2022-12-07 02:41:18 +02:00
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void handle_irq()
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2022-11-16 19:49:09 +02:00
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{
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uint16_t isr = PIC::get_isr();
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if (!isr) {
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2022-12-13 00:57:48 +02:00
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//kprint("Spurious IRQ\n");
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2022-12-07 02:41:18 +02:00
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return;
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}
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2022-11-16 19:49:09 +02:00
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2022-12-07 02:41:18 +02:00
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uint8_t irq = 0;
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for (uint8_t i = 0; i < 16; ++i) {
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if (i == 2)
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continue;
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if (isr & (1 << i)) {
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irq = i;
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break;
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}
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}
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2022-11-16 19:49:09 +02:00
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2022-12-07 02:41:18 +02:00
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if (s_irq_handlers[irq])
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s_irq_handlers[irq]();
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else
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kprint("no handler for irq {}\n", irq);
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PIC::eoi(irq);
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2022-11-16 19:49:09 +02:00
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}
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2022-12-07 02:41:18 +02:00
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namespace IDT
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{
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static void flush_idt()
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{
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asm volatile("lidt %0"::"m"(s_idtr));
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}
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static void unimplemented_trap()
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{
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Kernel::panic("Unhandeled IRQ");
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}
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static void register_interrupt_handler(uint8_t index, void (*f)())
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{
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s_idt[index].low = 0x00080000 | ((uint32_t)(f) & 0x0000ffff);
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s_idt[index].high = ((uint32_t)(f) & 0xffff0000) | 0x8e00;
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flush_idt();
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}
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void register_irq_handler(uint8_t irq, void (*f)())
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{
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s_irq_handlers[irq] = f;
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register_interrupt_handler(IRQ_VECTOR_BASE + irq, handle_irq_common);
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}
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void initialize()
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{
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constexpr size_t idt_size = 256;
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s_idt = new GateDescriptor[idt_size];
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s_idtr.offset = s_idt;
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s_idtr.size = idt_size * 8;
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for (uint8_t i = 0xff; i > 0x10; i--)
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register_interrupt_handler(i, unimplemented_trap);
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REGISTER_HANDLER(0x00);
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REGISTER_HANDLER(0x01);
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REGISTER_HANDLER(0x02);
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REGISTER_HANDLER(0x03);
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REGISTER_HANDLER(0x04);
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REGISTER_HANDLER(0x05);
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REGISTER_HANDLER(0x06);
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REGISTER_HANDLER(0x07);
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REGISTER_HANDLER(0x08);
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REGISTER_HANDLER(0x09);
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REGISTER_HANDLER(0x0a);
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REGISTER_HANDLER(0x0b);
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REGISTER_HANDLER(0x0c);
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REGISTER_HANDLER(0x0d);
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REGISTER_HANDLER(0x0e);
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REGISTER_HANDLER(0x0f);
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REGISTER_HANDLER(0x10);
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2022-12-13 00:57:48 +02:00
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for (uint8_t i = 0; i < 16; i++)
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register_irq_handler(i, nullptr);
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2022-12-07 02:41:18 +02:00
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flush_idt();
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}
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}
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