414 lines
9.8 KiB
C++
414 lines
9.8 KiB
C++
#include <BAN/Array.h>
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#include <BAN/Errors.h>
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#include <kernel/IDT.h>
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#include <kernel/InterruptController.h>
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#include <kernel/InterruptStack.h>
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#include <kernel/Memory/kmalloc.h>
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#include <kernel/Panic.h>
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#include <kernel/Process.h>
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#include <kernel/Scheduler.h>
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#include <kernel/Timer/PIT.h>
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#define ISR_LIST_X X(0) X(1) X(2) X(3) X(4) X(5) X(6) X(7) X(8) X(9) X(10) X(11) X(12) X(13) X(14) X(15) X(16) X(17) X(18) X(19) X(20) X(21) X(22) X(23) X(24) X(25) X(26) X(27) X(28) X(29) X(30) X(31)
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#define IRQ_LIST_X X(0) X(1) X(2) X(3) X(4) X(5) X(6) X(7) X(8) X(9) X(10) X(11) X(12) X(13) X(14) X(15) X(16) X(17) X(18) X(19) X(20) X(21) X(22) X(23) X(24) X(25) X(26) X(27) X(28) X(29) X(30) X(31)
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namespace Kernel::IDT
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{
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struct Registers
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{
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uint64_t rsp;
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uint64_t rip;
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uint64_t rflags;
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uint64_t cr4;
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uint64_t cr3;
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uint64_t cr2;
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uint64_t cr0;
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uint64_t r15;
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uint64_t r14;
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uint64_t r13;
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uint64_t r12;
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uint64_t r11;
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uint64_t r10;
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uint64_t r9;
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uint64_t r8;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t rbp;
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uint64_t rdx;
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uint64_t rcx;
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uint64_t rbx;
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uint64_t rax;
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};
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struct GateDescriptor
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{
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uint16_t offset1;
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uint16_t selector;
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uint8_t IST;
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uint8_t flags;
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uint16_t offset2;
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uint32_t offset3;
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uint32_t reserved;
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} __attribute__((packed));
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struct IDTR
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{
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uint16_t size;
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uint64_t offset;
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} __attribute__((packed));
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static IDTR s_idtr;
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static GateDescriptor* s_idt = nullptr;
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#define X(num) 1 +
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static BAN::Array<Interruptable*, IRQ_LIST_X 0> s_interruptables;
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#undef X
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enum ISR
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{
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DivisionError,
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Debug,
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NonMaskableInterrupt,
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Breakpoint,
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Overflow,
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BoundRangeException,
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InvalidOpcode,
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DeviceNotAvailable,
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DoubleFault,
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CoprocessorSegmentOverrun,
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InvalidTSS,
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SegmentNotPresent,
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StackSegmentFault,
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GeneralProtectionFault,
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PageFault,
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UnknownException0x0F,
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x87FloatingPointException,
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AlignmentCheck,
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MachineCheck,
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SIMDFloatingPointException,
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VirtualizationException,
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ControlProtectionException,
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UnknownException0x16,
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UnknownException0x17,
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UnknownException0x18,
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UnknownException0x19,
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UnknownException0x1A,
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UnknownException0x1B,
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HypervisorInjectionException,
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VMMCommunicationException,
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SecurityException,
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UnkownException0x1F,
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};
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struct PageFaultError
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{
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union
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{
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uint32_t raw;
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struct
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{
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uint32_t present : 1;
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uint32_t write : 1;
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uint32_t userspace : 1;
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uint32_t reserved_write : 1;
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uint32_t instruction : 1;
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uint32_t protection_key : 1;
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uint32_t shadow_stack : 1;
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uint32_t reserved1 : 8;
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uint32_t sgx_violation : 1;
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uint32_t reserved2 : 16;
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};
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};
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};
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static_assert(sizeof(PageFaultError) == 4);
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static const char* isr_exceptions[] =
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{
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"Division Error",
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"Debug",
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"Non-maskable Interrupt",
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"Breakpoint",
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"Overflow",
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"Bound Range Exception",
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"Invalid Opcode",
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"Device Not Available",
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"Double Fault",
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"Coprocessor Segment Overrun",
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"Invalid TSS",
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"Segment Not Present",
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"Stack-Segment Fault",
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"General Protection Fault",
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"Page Fault",
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"Unknown Exception 0x0F",
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"x87 Floating-Point Exception",
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"Alignment Check",
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"Machine Check",
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"SIMD Floating-Point Exception",
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"Virtualization Exception",
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"Control Protection Exception",
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"Unknown Exception 0x16",
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"Unknown Exception 0x17",
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"Unknown Exception 0x18",
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"Unknown Exception 0x19",
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"Unknown Exception 0x1A",
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"Unknown Exception 0x1B",
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"Hypervisor Injection Exception",
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"VMM Communication Exception",
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"Security Exception",
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"Unkown Exception 0x1F",
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};
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extern "C" void cpp_isr_handler(uint64_t isr, uint64_t error, InterruptStack& interrupt_stack, const Registers* regs)
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{
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#if __enable_sse
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bool from_userspace = (interrupt_stack.cs & 0b11) == 0b11;
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if (from_userspace)
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Thread::current().save_sse();
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#endif
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pid_t tid = Scheduler::current_tid();
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pid_t pid = tid ? Process::current().pid() : 0;
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if (tid)
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{
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Thread::current().set_return_rsp(interrupt_stack.rsp);
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Thread::current().set_return_rip(interrupt_stack.rip);
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if (isr == ISR::PageFault)
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{
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// Check if stack is OOB
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auto& stack = Thread::current().stack();
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auto& istack = Thread::current().interrupt_stack();
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if (stack.vaddr() < interrupt_stack.rsp && interrupt_stack.rsp <= stack.vaddr() + stack.size())
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; // using normal stack
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else if (istack.vaddr() < interrupt_stack.rsp && interrupt_stack.rsp <= istack.vaddr() + istack.size())
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; // using interrupt stack
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else
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{
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derrorln("Stack pointer out of bounds!");
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derrorln("rsp {H}, stack {H}->{H}, istack {H}->{H}",
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interrupt_stack.rsp,
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stack.vaddr(), stack.vaddr() + stack.size(),
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istack.vaddr(), istack.vaddr() + istack.size()
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);
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Thread::current().handle_signal(SIGKILL);
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goto done;
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}
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// Try demand paging on non present pages
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PageFaultError page_fault_error;
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page_fault_error.raw = error;
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if (!page_fault_error.present)
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{
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asm volatile("sti");
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auto result = Process::current().allocate_page_for_demand_paging(regs->cr2);
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asm volatile("cli");
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if (!result.is_error() && result.value())
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goto done;
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if (result.is_error())
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{
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dwarnln("Demand paging: {}", result.error());
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Thread::current().handle_signal(SIGKILL);
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goto done;
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}
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}
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}
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}
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if (PageTable::current().get_page_flags(interrupt_stack.rip & PAGE_ADDR_MASK) & PageTable::Flags::Present)
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{
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auto* machine_code = (const uint8_t*)interrupt_stack.rip;
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dwarnln("While executing: {2H}{2H}{2H}{2H}{2H}{2H}{2H}{2H}",
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machine_code[0],
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machine_code[1],
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machine_code[2],
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machine_code[3],
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machine_code[4],
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machine_code[5],
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machine_code[6],
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machine_code[7]
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);
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}
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dwarnln(
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"{} (error code: 0x{16H}), pid {}, tid {}\r\n"
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"Register dump\r\n"
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"rax=0x{16H}, rbx=0x{16H}, rcx=0x{16H}, rdx=0x{16H}\r\n"
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"rsp=0x{16H}, rbp=0x{16H}, rdi=0x{16H}, rsi=0x{16H}\r\n"
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"rip=0x{16H}, rflags=0x{16H}\r\n"
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"cr0=0x{16H}, cr2=0x{16H}, cr3=0x{16H}, cr4=0x{16H}",
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isr_exceptions[isr], error, pid, tid,
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regs->rax, regs->rbx, regs->rcx, regs->rdx,
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regs->rsp, regs->rbp, regs->rdi, regs->rsi,
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regs->rip, regs->rflags,
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regs->cr0, regs->cr2, regs->cr3, regs->cr4
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);
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if (isr == ISR::PageFault)
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PageTable::current().debug_dump();
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Debug::dump_stack_trace();
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if (tid && Thread::current().is_userspace())
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{
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// TODO: Confirm and fix the exception to signal mappings
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int signal = 0;
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switch (isr)
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{
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case ISR::DeviceNotAvailable:
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case ISR::DivisionError:
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case ISR::SIMDFloatingPointException:
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case ISR::x87FloatingPointException:
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signal = SIGFPE;
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break;
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case ISR::AlignmentCheck:
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signal = SIGBUS;
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break;
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case ISR::InvalidOpcode:
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signal = SIGILL;
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break;
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case ISR::PageFault:
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signal = SIGSEGV;
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break;
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default:
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dwarnln("Unhandled exception");
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signal = SIGABRT;
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break;
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}
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Thread::current().handle_signal(signal);
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}
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else
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{
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panic("Unhandled exception");
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}
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ASSERT(Thread::current().state() != Thread::State::Terminated);
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done:
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#if __enable_sse
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if (from_userspace)
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{
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ASSERT(Thread::current().state() == Thread::State::Executing);
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Thread::current().load_sse();
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}
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#endif
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return;
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}
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extern "C" void cpp_irq_handler(uint64_t irq, InterruptStack& interrupt_stack)
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{
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#if __enable_sse
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bool from_userspace = (interrupt_stack.cs & 0b11) == 0b11;
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if (from_userspace)
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Thread::current().save_sse();
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#endif
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if (Scheduler::current_tid())
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{
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Thread::current().set_return_rsp(interrupt_stack.rsp);
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Thread::current().set_return_rip(interrupt_stack.rip);
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}
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if (!InterruptController::get().is_in_service(irq))
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dprintln("spurious irq 0x{2H}", irq);
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else
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{
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InterruptController::get().eoi(irq);
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if (s_interruptables[irq])
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s_interruptables[irq]->handle_irq();
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else
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dprintln("no handler for irq 0x{2H}\n", irq);
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}
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Scheduler::get().reschedule_if_idling();
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ASSERT(Thread::current().state() != Thread::State::Terminated);
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#if __enable_sse
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if (from_userspace)
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{
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ASSERT(Thread::current().state() == Thread::State::Executing);
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Thread::current().load_sse();
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}
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#endif
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}
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static void flush_idt()
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{
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asm volatile("lidt %0"::"m"(s_idtr));
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}
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static void register_interrupt_handler(uint8_t index, void(*handler)())
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{
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GateDescriptor& descriptor = s_idt[index];
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descriptor.offset1 = (uint16_t)((uint64_t)handler >> 0);
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descriptor.offset2 = (uint16_t)((uint64_t)handler >> 16);
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descriptor.offset3 = (uint32_t)((uint64_t)handler >> 32);
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descriptor.selector = 0x08;
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descriptor.IST = 0;
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descriptor.flags = 0x8E;
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}
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static void register_syscall_handler(uint8_t index, void(*handler)())
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{
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register_interrupt_handler(index, handler);
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s_idt[index].flags = 0xEE;
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}
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void register_irq_handler(uint8_t irq, Interruptable* interruptable)
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{
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if (irq > s_interruptables.size())
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Kernel::panic("Trying to assign handler for irq {} while only {} are supported", irq, s_interruptables.size());
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s_interruptables[irq] = interruptable;
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}
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#define X(num) extern "C" void isr ## num();
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ISR_LIST_X
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#undef X
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#define X(num) extern "C" void irq ## num();
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IRQ_LIST_X
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#undef X
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extern "C" void syscall_asm();
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void initialize()
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{
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s_idt = (GateDescriptor*)kmalloc(0x100 * sizeof(GateDescriptor));
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ASSERT(s_idt);
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memset(s_idt, 0x00, 0x100 * sizeof(GateDescriptor));
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s_idtr.offset = (uint64_t)s_idt;
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s_idtr.size = 0x100 * sizeof(GateDescriptor) - 1;
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#define X(num) register_interrupt_handler(num, isr ## num);
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ISR_LIST_X
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#undef X
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#define X(num) register_interrupt_handler(IRQ_VECTOR_BASE + num, irq ## num);
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IRQ_LIST_X
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#undef X
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register_syscall_handler(0x80, syscall_asm);
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flush_idt();
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}
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[[noreturn]] void force_triple_fault()
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{
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// load 0 sized IDT and trigger an interrupt to force triple fault
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asm volatile("cli");
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s_idtr.size = 0;
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flush_idt();
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asm volatile("int $0x00");
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ASSERT_NOT_REACHED();
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}
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}
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