224 lines
6.6 KiB
C++
224 lines
6.6 KiB
C++
#include <BAN/Errors.h>
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#include <kernel/IDT.h>
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#include <kernel/InterruptController.h>
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#include <kernel/kmalloc.h>
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#include <kernel/Panic.h>
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#define INTERRUPT_HANDLER____(i, msg) \
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static void interrupt ## i () \
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{ \
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uint32_t eax, ebx, ecx, edx; \
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uint32_t esp, ebp; \
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uint32_t cr0, cr2, cr3, cr4; \
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asm volatile("":"=a"(eax),"=b"(ebx),"=c"(ecx),"=d"(edx)); \
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asm volatile("movl %%esp, %%eax":"=a"(esp)); \
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asm volatile("movl %%ebp, %%eax":"=a"(ebp)); \
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asm volatile("movl %%cr0, %%eax":"=a"(cr0)); \
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asm volatile("movl %%cr2, %%eax":"=a"(cr2)); \
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asm volatile("movl %%cr3, %%eax":"=a"(cr3)); \
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asm volatile("movl %%cr4, %%eax":"=a"(cr4)); \
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Kernel::panic(msg "\r\nRegister dump\r\n" \
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"eax=0x{8H}, ebx=0x{8H}, ecx=0x{8H}, edx=0x{8H}\r\n" \
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"esp=0x{8H}, ebp=0x{8H}\r\n" \
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"CR0=0x{8H}, CR2=0x{8H}, CR3=0x{8H}, CR4=0x{8H}\r\n", \
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eax, ebx, ecx, edx, esp, ebp, cr0, cr2, cr3, cr4); \
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}
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#define INTERRUPT_HANDLER_ERR(i, msg) \
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static void interrupt ## i () \
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{ \
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uint32_t eax, ebx, ecx, edx; \
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uint32_t esp, ebp; \
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uint32_t cr0, cr2, cr3, cr4; \
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uint32_t error_code; \
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asm volatile("":"=a"(eax),"=b"(ebx),"=c"(ecx),"=d"(edx)); \
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asm volatile("movl %%esp, %%eax":"=a"(esp)); \
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asm volatile("movl %%ebp, %%eax":"=a"(ebp)); \
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asm volatile("movl %%cr0, %%eax":"=a"(cr0)); \
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asm volatile("movl %%cr2, %%eax":"=a"(cr2)); \
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asm volatile("movl %%cr3, %%eax":"=a"(cr3)); \
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asm volatile("movl %%cr4, %%eax":"=a"(cr4)); \
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asm volatile("popl %%eax":"=a"(error_code)); \
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Kernel::panic(msg " (error code: 0x{8H})\r\n" \
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"Register dump\r\n" \
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"eax=0x{8H}, ebx=0x{8H}, ecx=0x{8H}, edx=0x{8H}\r\n" \
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"esp=0x{8H}, ebp=0x{8H}\r\n" \
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"CR0=0x{8H}, CR2=0x{8H}, CR3=0x{8H}, CR4=0x{8H}\r\n", \
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eax, ebx, ecx, edx, esp, ebp, cr0, cr2, cr3, cr4, error_code); \
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}
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#define REGISTER_HANDLER(i) register_interrupt_handler(i, interrupt ## i)
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namespace IDT
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{
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struct GateDescriptor
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{
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uint16_t offset1;
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uint16_t selector;
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uint8_t reserved : 5;
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uint8_t zero1 : 3;
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uint8_t type : 4;
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uint8_t zero2 : 1;
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uint8_t DPL : 2;
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uint8_t present : 1;
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uint16_t offset2;
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} __attribute__((packed));
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struct IDTR
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{
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uint16_t size;
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void* offset;
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} __attribute((packed));
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static IDTR s_idtr;
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static GateDescriptor* s_idt = nullptr;
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static void(*s_irq_handlers[16])() { nullptr };
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INTERRUPT_HANDLER____(0x00, "Division Error")
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INTERRUPT_HANDLER____(0x01, "Debug")
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INTERRUPT_HANDLER____(0x02, "Non-maskable Interrupt")
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INTERRUPT_HANDLER____(0x03, "Breakpoint")
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INTERRUPT_HANDLER____(0x04, "Overflow")
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INTERRUPT_HANDLER____(0x05, "Bound Range Exception")
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INTERRUPT_HANDLER____(0x06, "Invalid Opcode")
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INTERRUPT_HANDLER____(0x07, "Device Not Available")
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INTERRUPT_HANDLER_ERR(0x08, "Double Fault")
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INTERRUPT_HANDLER____(0x09, "Coprocessor Segment Overrun")
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INTERRUPT_HANDLER_ERR(0x0A, "Invalid TSS")
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INTERRUPT_HANDLER_ERR(0x0B, "Segment Not Present")
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INTERRUPT_HANDLER_ERR(0x0C, "Stack-Segment Fault")
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INTERRUPT_HANDLER_ERR(0x0D, "General Protection Fault")
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INTERRUPT_HANDLER_ERR(0x0E, "Page Fault")
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INTERRUPT_HANDLER____(0x0F, "Unknown Exception 0x0F")
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INTERRUPT_HANDLER____(0x10, "x87 Floating-Point Exception")
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INTERRUPT_HANDLER_ERR(0x11, "Alignment Check")
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INTERRUPT_HANDLER____(0x12, "Machine Check")
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INTERRUPT_HANDLER____(0x13, "SIMD Floating-Point Exception")
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INTERRUPT_HANDLER____(0x14, "Virtualization Exception")
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INTERRUPT_HANDLER_ERR(0x15, "Control Protection Exception")
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INTERRUPT_HANDLER____(0x16, "Unknown Exception 0x16")
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INTERRUPT_HANDLER____(0x17, "Unknown Exception 0x17")
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INTERRUPT_HANDLER____(0x18, "Unknown Exception 0x18")
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INTERRUPT_HANDLER____(0x19, "Unknown Exception 0x19")
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INTERRUPT_HANDLER____(0x1A, "Unknown Exception 0x1A")
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INTERRUPT_HANDLER____(0x1B, "Unknown Exception 0x1B")
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INTERRUPT_HANDLER____(0x1C, "Hypervisor Injection Exception")
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INTERRUPT_HANDLER_ERR(0x1D, "VMM Communication Exception")
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INTERRUPT_HANDLER_ERR(0x1E, "Security Exception")
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INTERRUPT_HANDLER____(0x1F, "Unkown Exception 0x1F")
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extern "C" void handle_irq()
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{
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uint8_t irq;
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for (uint32_t i = 0; i < 16; i++)
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{
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if (InterruptController::get().is_in_service(i))
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{
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irq = i;
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goto found;
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}
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}
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dprintln("Spurious irq");
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return;
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found:
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if (s_irq_handlers[irq])
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s_irq_handlers[irq]();
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else
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dprintln("no handler for irq 0x{2H}\n", irq);
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// NOTE: Scheduler sends PIT eoi's
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if (irq != PIT_IRQ)
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InterruptController::get().eoi(irq);
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}
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extern "C" void handle_irq_common();
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asm(
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".globl handle_irq_common;"
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"handle_irq_common:"
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"pusha;"
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"pushw %ds;"
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"pushw %es;"
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"pushw %ss;"
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"pushw %ss;"
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"popw %ds;"
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"popw %es;"
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"call handle_irq;"
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"popw %es;"
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"popw %ds;"
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"popa;"
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"iret;"
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);
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static void flush_idt()
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{
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asm volatile("lidt %0"::"m"(s_idtr));
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}
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static void register_interrupt_handler(uint8_t index, void(*f)())
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{
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GateDescriptor& descriptor = s_idt[index];
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descriptor.offset1 = (uint32_t)f & 0xFFFF;
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descriptor.selector = 0x08;
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descriptor.type = 0xE;
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descriptor.DPL = 0;
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descriptor.present = 1;
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descriptor.offset2 = (uint32_t)f >> 16;
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}
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void register_irq_handler(uint8_t irq, void(*f)())
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{
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s_irq_handlers[irq] = f;
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register_interrupt_handler(IRQ_VECTOR_BASE + irq, handle_irq_common);
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flush_idt();
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}
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void initialize()
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{
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constexpr size_t idt_size = 0x100 * sizeof(GateDescriptor);
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s_idt = (GateDescriptor*)kmalloc_eternal(idt_size);
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memset(s_idt, 0x00, idt_size);
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s_idtr.offset = s_idt;
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s_idtr.size = idt_size - 1;
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REGISTER_HANDLER(0x00);
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REGISTER_HANDLER(0x01);
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REGISTER_HANDLER(0x02);
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REGISTER_HANDLER(0x03);
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REGISTER_HANDLER(0x04);
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REGISTER_HANDLER(0x05);
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REGISTER_HANDLER(0x06);
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REGISTER_HANDLER(0x07);
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REGISTER_HANDLER(0x08);
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REGISTER_HANDLER(0x09);
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REGISTER_HANDLER(0x0A);
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REGISTER_HANDLER(0x0B);
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REGISTER_HANDLER(0x0C);
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REGISTER_HANDLER(0x0D);
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REGISTER_HANDLER(0x0E);
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REGISTER_HANDLER(0x0F);
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REGISTER_HANDLER(0x10);
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REGISTER_HANDLER(0x11);
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REGISTER_HANDLER(0x12);
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REGISTER_HANDLER(0x13);
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REGISTER_HANDLER(0x14);
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REGISTER_HANDLER(0x15);
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REGISTER_HANDLER(0x16);
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REGISTER_HANDLER(0x17);
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REGISTER_HANDLER(0x18);
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REGISTER_HANDLER(0x19);
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REGISTER_HANDLER(0x1A);
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REGISTER_HANDLER(0x1B);
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REGISTER_HANDLER(0x1C);
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REGISTER_HANDLER(0x1D);
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REGISTER_HANDLER(0x1E);
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REGISTER_HANDLER(0x1F);
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flush_idt();
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}
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} |