There is no need to save and load sse state on every interrupt. Instead we can use CR0.TS to make threads trigger an interrupt when they use sse instructions. This can be used to only save and load sse state when needed. Processor now keeps track of its current "sse thread" and the scheduler either enabled or disabled sse based on which thread it is starting up. When a thread dies, it checks if it was the current sse thread to avoid use after free bugs. When load balancing, processor has to save the thread's sse state before sending it to a new processor (if it was the current sse thread). This ensures thread's sse state will be correct when the new processor ends up loading it. |
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| .. | ||
| arch | ||
| font | ||
| include/kernel | ||
| kernel | ||
| klibc | ||
| CMakeLists.txt | ||
| icxxabi.cpp | ||
| ubsan.cpp | ||