Bananymous
5329ec5912
The old SpinLockAsMutex was pretty confusing first of all. It also was causing the issue thats been around for maybe a year now which is the only consistently happening kernel panic. I've been pretty confused about this and finally figured out what was causing this. The main issue was that we were accidentally enabling interrupts when blocking a thread that passed SpinLockAsMutex from normally interrupt enabled context. This led to receiving IPI for thread unblock while we were actively blocking the thread. I'm very suprized this had't caused any more serious issues than occasional kernel panics :^)
515 lines
15 KiB
C++
515 lines
15 KiB
C++
#include <kernel/Audio/HDAudio/AudioFunctionGroup.h>
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#include <kernel/Audio/HDAudio/Controller.h>
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#include <kernel/Audio/HDAudio/Registers.h>
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#include <kernel/Lock/BlockableSpinLock.h>
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#include <kernel/Lock/LockGuard.h>
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#include <kernel/MMIO.h>
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#include <kernel/Timer/Timer.h>
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namespace Kernel
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{
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BAN::ErrorOr<void> HDAudioController::create(PCI::Device& pci_device)
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{
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auto intel_hda_ptr = new HDAudioController(pci_device);
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if (intel_hda_ptr == nullptr)
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return BAN::Error::from_errno(ENOMEM);
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auto intel_hda = BAN::RefPtr<HDAudioController>::adopt(intel_hda_ptr);
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TRY(intel_hda->initialize());
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return {};
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}
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BAN::ErrorOr<void> HDAudioController::initialize()
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{
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using Regs = HDAudio::Regs;
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m_pci_device.enable_bus_mastering();
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m_bar0 = TRY(m_pci_device.allocate_bar_region(0));
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dprintln("HD audio");
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dprintln(" revision {}.{}",
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m_bar0->read8(Regs::VMAJ),
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m_bar0->read8(Regs::VMIN)
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);
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const uint16_t global_cap = m_bar0->read16(Regs::GCAP);
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m_output_streams = (global_cap >> 12) & 0x0F;
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m_input_streams = (global_cap >> 8) & 0x0F;
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m_bidir_streams = (global_cap >> 3) & 0x1F;
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m_is64bit = (global_cap & 1);
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if (m_output_streams + m_input_streams + m_bidir_streams > 30)
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{
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dwarnln("HD audio controller has {} streams, 30 is the maximum valid count",
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m_output_streams + m_input_streams + m_bidir_streams
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);
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return BAN::Error::from_errno(EINVAL);
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}
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dprintln(" output streams: {}", m_output_streams);
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dprintln(" input streams: {}", m_input_streams);
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dprintln(" bidir streams: {}", m_bidir_streams);
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dprintln(" 64 bit support: {}", m_is64bit);
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TRY(reset_controller());
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if (auto ret = initialize_ring_buffers(); ret.is_error())
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{
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if (ret.error().get_error_code() != ETIMEDOUT)
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return ret.release_error();
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m_use_immediate_command = true;
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}
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TRY(m_pci_device.reserve_interrupts(1));
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m_pci_device.enable_interrupt(0, *this);
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m_bar0->write32(Regs::INTCTL, UINT32_MAX);
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const uint16_t state_sts = m_bar0->read16(Regs::STATESTS);
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for (uint8_t codec_id = 0; codec_id < 15; codec_id++)
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{
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if (!(state_sts & (1 << codec_id)))
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continue;
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auto codec_or_error = initialize_codec(codec_id);
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if (codec_or_error.is_error())
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continue;
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auto codec = codec_or_error.release_value();
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for (auto& node : codec.nodes)
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if (auto ret = HDAudioFunctionGroup::create(this, codec.id, BAN::move(node)); ret.is_error())
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dwarnln("Failed to initialize AFG: {}", ret.error());
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}
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return {};
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}
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BAN::ErrorOr<void> HDAudioController::reset_controller()
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{
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using HDAudio::Regs;
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const auto timeout_ms = SystemTimer::get().ms_since_boot() + 100;
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// transition into reset state
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if (const uint32_t gcap = m_bar0->read32(Regs::GCTL); gcap & 1)
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{
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m_bar0->write32(Regs::GCTL, gcap & 0xFFFFFEFC);
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while (m_bar0->read32(Regs::GCTL) & 1)
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{
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if (SystemTimer::get().ms_since_boot() > timeout_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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Processor::pause();
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}
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}
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m_bar0->write32(Regs::GCTL, (m_bar0->read32(Regs::GCTL) & 0xFFFFFEFC) | 1);
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while (!(m_bar0->read32(Regs::GCTL) & 1))
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{
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if (SystemTimer::get().ms_since_boot() > timeout_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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Processor::pause();
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}
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// 4.3 The software must wait at least 521 us (25 frames) after reading CRST as a 1
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// before assuming that codecs have all made status change requests and have been
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// registered by the controller
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SystemTimer::get().sleep_for_ns(521'000);
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return {};
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}
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BAN::ErrorOr<void> HDAudioController::initialize_ring_buffers()
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{
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using Regs = HDAudio::Regs;
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// CORB: at most 1024 bytes (256 * uint32_t)
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// RIRB: at most 2048 bytes (256 * uint32_t * 2)
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m_ring_buffer_region = TRY(DMARegion::create(3 * 256 * sizeof(uint32_t)));
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struct SizeInfo
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{
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uint16_t size;
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uint8_t value;
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};
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const auto get_size_info =
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[](uint8_t byte) -> BAN::ErrorOr<SizeInfo>
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{
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if (byte & 0x40)
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return SizeInfo { 256, 2 };
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if (byte & 0x20)
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return SizeInfo { 16, 1 };
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if (byte & 0x10)
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return SizeInfo { 2, 0 };
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return BAN::Error::from_errno(EINVAL);
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};
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const auto corb_size = TRY(get_size_info(m_bar0->read8(Regs::CORBSIZE)));
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const auto rirb_size = TRY(get_size_info(m_bar0->read8(Regs::RIRBSIZE)));
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m_corb = {
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.vaddr = m_ring_buffer_region->vaddr(),
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.index = 1,
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.size = corb_size.size,
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};
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m_rirb = {
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.vaddr = m_ring_buffer_region->vaddr() + 1024,
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.index = 1,
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.size = rirb_size.size,
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};
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const paddr_t corb_paddr = m_ring_buffer_region->paddr();
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const paddr_t rirb_paddr = m_ring_buffer_region->paddr() + 1024;
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if (!m_is64bit && ((corb_paddr >> 32) || (rirb_paddr >> 32)))
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{
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dwarnln("no 64 bit support but allocated ring buffers have 64 bit addresses :(");
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return BAN::Error::from_errno(ENOTSUP);
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}
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// disable corb and rirb
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m_bar0->write8(Regs::CORBCTL, (m_bar0->read8(Regs::CORBCTL) & 0xFC));
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m_bar0->write8(Regs::RIRBCTL, (m_bar0->read8(Regs::RIRBCTL) & 0xF8));
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// set base address
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m_bar0->write32(Regs::CORBLBASE, corb_paddr | (m_bar0->read32(Regs::CORBLBASE) & 0x0000007F));
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if (m_is64bit)
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m_bar0->write32(Regs::CORBUBASE, corb_paddr >> 32);
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// set number of entries
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m_bar0->write8(Regs::CORBSIZE, (m_bar0->read8(Regs::CORBSIZE) & 0xFC) | corb_size.value);
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// zero write pointer
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m_bar0->write16(Regs::CORBWP, (m_bar0->read16(Regs::CORBWP) & 0xFF00));
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// reset read pointer
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const uint64_t corb_timeout_ms = SystemTimer::get().ms_since_boot() + 100;
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m_bar0->write16(Regs::CORBRP, (m_bar0->read16(Regs::CORBRP) & 0x7FFF) | 0x8000);
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while (!(m_bar0->read16(Regs::CORBRP) & 0x8000))
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{
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if (SystemTimer::get().ms_since_boot() > corb_timeout_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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Processor::pause();
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}
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m_bar0->write16(Regs::CORBRP, (m_bar0->read16(Regs::CORBRP) & 0x7FFF));
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while ((m_bar0->read16(Regs::CORBRP) & 0x8000))
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{
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if (SystemTimer::get().ms_since_boot() > corb_timeout_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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Processor::pause();
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}
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// set base address
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m_bar0->write32(Regs::RIRBLBASE, rirb_paddr | (m_bar0->read32(Regs::RIRBLBASE) & 0x0000007F));
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if (m_is64bit)
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m_bar0->write32(Regs::RIRBUBASE, rirb_paddr >> 32);
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// set number of entries
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m_bar0->write8(Regs::RIRBSIZE, (m_bar0->read8(Regs::RIRBSIZE) & 0xFC) | rirb_size.value);
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// reset write pointer
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m_bar0->write16(Regs::RIRBWP, (m_bar0->read16(Regs::RIRBWP) & 0x7FFF) | 0x8000);
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// send interrupt on every packet
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m_bar0->write16(Regs::RINTCNT, (m_bar0->read16(Regs::RINTCNT) & 0xFF00) | 0x01);
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// enable corb and rirb
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m_bar0->write8(Regs::CORBCTL, (m_bar0->read8(Regs::CORBCTL) & 0xFC) | 3);
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m_bar0->write8(Regs::RIRBCTL, (m_bar0->read8(Regs::RIRBCTL) & 0xF8) | 7);
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return {};
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}
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BAN::ErrorOr<HDAudio::Codec> HDAudioController::initialize_codec(uint8_t codec)
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{
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const auto resp = TRY(send_command({
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.data = 0x04,
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.command = 0xF00,
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.node_index = 0,
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.codec_address = codec,
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}));
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const uint8_t start = (resp >> 16) & 0xFF;
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const uint8_t count = (resp >> 0) & 0xFF;
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if (count == 0)
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return BAN::Error::from_errno(ENODEV);
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HDAudio::Codec result {};
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result.id = codec;
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TRY(result.nodes.reserve(count));
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for (size_t i = 0; i < count; i++)
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if (auto node_or_error = initialize_node(codec, start + i); !node_or_error.is_error())
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MUST(result.nodes.emplace_back(node_or_error.release_value()));
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return result;
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}
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BAN::ErrorOr<HDAudio::AFGNode> HDAudioController::initialize_node(uint8_t codec, uint8_t node)
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{
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{
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const auto resp = TRY(send_command({
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.data = 0x05,
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.command = 0xF00,
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.node_index = node,
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.codec_address = codec,
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}));
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const uint8_t type = (resp >> 0) & 0xFF;
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if (type != 0x01)
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return BAN::Error::from_errno(ENODEV);
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}
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const auto resp = TRY(send_command({
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.data = 0x04,
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.command = 0xF00,
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.node_index = node,
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.codec_address = codec,
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}));
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const uint8_t start = (resp >> 16) & 0xFF;
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const uint8_t count = (resp >> 0) & 0xFF;
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HDAudio::AFGNode result {};
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result.id = node;
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TRY(result.widgets.reserve(count));
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for (size_t i = 0; i < count; i++)
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if (auto widget_or_error = initialize_widget(codec, start + i); !widget_or_error.is_error())
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MUST(result.widgets.emplace_back(widget_or_error.release_value()));
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return result;
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}
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BAN::ErrorOr<HDAudio::AFGWidget> HDAudioController::initialize_widget(uint8_t codec, uint8_t widget)
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{
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const auto send_command_or_zero =
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[codec, widget, this](uint16_t cmd, uint8_t data) -> uint32_t
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{
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const auto command = HDAudio::CORBEntry {
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.data = data,
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.command = cmd,
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.node_index = widget,
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.codec_address = codec,
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};
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if (auto res = send_command(command); !res.is_error())
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return res.release_value();
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return 0;
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};
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using HDAudio::AFGWidget;
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const AFGWidget::Type type_list[] {
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AFGWidget::Type::OutputConverter,
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AFGWidget::Type::InputConverter,
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AFGWidget::Type::Mixer,
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AFGWidget::Type::Selector,
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AFGWidget::Type::PinComplex,
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AFGWidget::Type::Power,
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AFGWidget::Type::VolumeKnob,
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AFGWidget::Type::BeepGenerator,
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};
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const uint8_t type = (send_command_or_zero(0xF00, 0x09) >> 20) & 0x0F;
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if (type > sizeof(type_list) / sizeof(*type_list))
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return BAN::Error::from_errno(ENOTSUP);
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AFGWidget result {};
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result.type = type_list[type];
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result.id = widget;
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if (result.type == AFGWidget::Type::PinComplex)
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{
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const uint32_t cap = send_command_or_zero(0xF00, 0x0C);
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result.pin_complex = {
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.input = !!(cap & (1 << 5)),
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.output = !!(cap & (1 << 4)),
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.display = !!(cap & ((1 << 7) | (1 << 24))),
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.config = send_command_or_zero(0xF1C, 0x00),
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};
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}
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if (const uint32_t out_amp_cap = send_command_or_zero(0xF00, 0x12))
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{
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const uint8_t offset = (out_amp_cap >> 0) & 0x7F;
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const uint8_t num_steps = (out_amp_cap >> 8) & 0x7F;
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const uint8_t step_size = (out_amp_cap >> 16) & 0x7F;
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const bool mute = (out_amp_cap >> 31);
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result.output_amplifier = HDAudio::AFGWidget::Amplifier {
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.offset = offset,
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.num_steps = num_steps,
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.step_size = step_size,
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.mute = mute,
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};
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}
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const uint8_t connection_info = send_command_or_zero(0xF00, 0x0E);
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const uint8_t conn_width = (connection_info & 0x80) ? 2 : 1;
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const uint8_t conn_count = connection_info & 0x3F;
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const uint16_t conn_mask = (1 << (8 * conn_width)) - 1;
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TRY(result.connections.resize(conn_count, 0));
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for (size_t i = 0; i < conn_count; i += 4 / conn_width)
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{
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const uint32_t conn = send_command_or_zero(0xF02, i);
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for (size_t j = 0; j < sizeof(conn) / conn_width && i + j < conn_count; j++)
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result.connections[i + j] = (conn >> (8 * conn_width * j)) & conn_mask;
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}
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return result;
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}
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BAN::ErrorOr<uint32_t> HDAudioController::send_command(HDAudio::CORBEntry command)
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{
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using Regs = HDAudio::Regs;
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// TODO: allow concurrent commands with CORB/RIRB
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LockGuard _(m_command_mutex);
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if (!m_use_immediate_command)
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{
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SpinLockGuard sguard(m_rb_lock);
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MMIO::write32(m_corb.vaddr + m_corb.index * sizeof(uint32_t), command.raw);
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m_bar0->write16(Regs::CORBWP, (m_bar0->read16(Regs::CORBWP) & 0xFF00) | m_corb.index);
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m_corb.index = (m_corb.index + 1) % m_corb.size;
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const uint64_t waketime_ms = SystemTimer::get().ms_since_boot() + 10;
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while ((m_bar0->read16(Regs::RIRBWP) & 0xFF) != m_rirb.index)
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{
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if (SystemTimer::get().ms_since_boot() > waketime_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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BlockableSpinLock block(m_rb_lock);
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m_rb_blocker.block_with_timeout_ms(10, &block);
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}
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const size_t offset = 2 * m_rirb.index * sizeof(uint32_t);
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m_rirb.index = (m_rirb.index + 1) % m_rirb.size;
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return MMIO::read32(m_rirb.vaddr + offset);
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}
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else
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{
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uint64_t waketime_ms = SystemTimer::get().ms_since_boot() + 10;
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while (m_bar0->read16(Regs::ICIS) & 1)
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{
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if (SystemTimer::get().ms_since_boot() > waketime_ms)
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break;
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Processor::pause();
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}
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// clear ICB if it did not clear "in reasonable timeout period"
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// and make sure IRV is cleared
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if (m_bar0->read16(Regs::ICIS) & 3)
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m_bar0->write16(Regs::ICIS, (m_bar0->read16(Regs::ICIS) & 0x00FC) | 2);
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m_bar0->write32(Regs::ICOI, command.raw);
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m_bar0->write16(Regs::ICIS, (m_bar0->read16(Regs::ICIS) & 0x00FC) | 1);
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waketime_ms = SystemTimer::get().ms_since_boot() + 10;
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while (!(m_bar0->read16(Regs::ICIS) & 2))
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{
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if (SystemTimer::get().ms_since_boot() > waketime_ms)
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return BAN::Error::from_errno(ETIMEDOUT);
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Processor::pause();
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}
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return m_bar0->read32(Regs::ICII);
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}
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}
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void HDAudioController::handle_irq()
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{
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using Regs = HDAudio::Regs;
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const uint32_t intsts = m_bar0->read32(Regs::INTSTS);
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if (!(intsts & (1u << 31)))
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return;
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if (intsts & (1 << 30))
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{
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if (const uint8_t rirbsts = m_bar0->read8(Regs::RIRBSTS) & ((1 << 2) | (1 << 0)))
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{
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if (rirbsts & (1 << 2))
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dwarnln("RIRB response overrun");
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if (rirbsts & (1 << 0))
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{
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SpinLockGuard _(m_rb_lock);
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m_rb_blocker.unblock();
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}
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m_bar0->write8(Regs::RIRBSTS, rirbsts);
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}
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if (const uint8_t corbsts = m_bar0->read8(Regs::CORBSTS) & (1 << 0))
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{
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dwarnln("CORB memory error");
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m_bar0->write8(Regs::CORBSTS, corbsts);
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|
}
|
|
}
|
|
|
|
for (size_t i = 0; i < 30; i++)
|
|
{
|
|
if (!(intsts & (1 << i)))
|
|
continue;
|
|
if (m_allocated_streams[i] == nullptr)
|
|
dwarnln("interrupt from an unallocated stream??");
|
|
else
|
|
static_cast<HDAudioFunctionGroup*>(m_allocated_streams[i])->on_stream_interrupt(i);
|
|
}
|
|
}
|
|
|
|
uint8_t HDAudioController::get_stream_index(HDAudio::StreamType type, uint8_t index) const
|
|
{
|
|
switch (type)
|
|
{
|
|
case HDAudio::StreamType::Bidirectional:
|
|
index += m_output_streams;
|
|
[[fallthrough]];
|
|
case HDAudio::StreamType::Output:
|
|
index += m_input_streams;
|
|
[[fallthrough]];
|
|
case HDAudio::StreamType::Input:
|
|
break;
|
|
}
|
|
return index;
|
|
}
|
|
|
|
BAN::ErrorOr<uint8_t> HDAudioController::allocate_stream_id()
|
|
{
|
|
for (uint8_t id = 1; id < 16; id++)
|
|
{
|
|
if (m_allocated_stream_ids & (1 << id))
|
|
continue;
|
|
m_allocated_stream_ids |= 1 << id;
|
|
return id;
|
|
}
|
|
|
|
return BAN::Error::from_errno(EAGAIN);
|
|
}
|
|
|
|
void HDAudioController::deallocate_stream_id(uint8_t id)
|
|
{
|
|
ASSERT(m_allocated_stream_ids & (1 << id));
|
|
m_allocated_stream_ids &= ~(1 << id);
|
|
}
|
|
|
|
BAN::ErrorOr<uint8_t> HDAudioController::allocate_stream(HDAudio::StreamType type, void* afg)
|
|
{
|
|
const uint8_t stream_count_lookup[] {
|
|
[(int)HDAudio::StreamType::Input] = m_input_streams,
|
|
[(int)HDAudio::StreamType::Output] = m_output_streams,
|
|
[(int)HDAudio::StreamType::Bidirectional] = m_bidir_streams,
|
|
};
|
|
|
|
const uint8_t stream_count = stream_count_lookup[static_cast<int>(type)];
|
|
for (uint8_t i = 0; i < stream_count; i++)
|
|
{
|
|
const uint8_t index = get_stream_index(type, i);
|
|
if (m_allocated_streams[index])
|
|
continue;
|
|
m_allocated_streams[index] = afg;
|
|
return index;
|
|
}
|
|
|
|
return BAN::Error::from_errno(EAGAIN);
|
|
}
|
|
|
|
void HDAudioController::deallocate_stream(uint8_t index)
|
|
{
|
|
ASSERT(m_allocated_streams[index]);
|
|
m_allocated_streams[index] = nullptr;
|
|
// TODO: maybe make sure the stream is stopped/reset (?)
|
|
}
|
|
|
|
}
|