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No commits in common. "b8622f2b4bfc8b7d6055db1d05bfa59cdb788aaa" and "f7e549e4125ee9d0148812f5902cd4cce4e2d16b" have entirely different histories.
b8622f2b4b
...
f7e549e412
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@ -65,7 +65,6 @@ set(KERNEL_SOURCES
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kernel/Networking/NetworkLayer.cpp
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kernel/Networking/NetworkManager.cpp
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kernel/Networking/NetworkSocket.cpp
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kernel/Networking/RTL8169/RTL8169.cpp
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kernel/Networking/TCPSocket.cpp
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kernel/Networking/UDPSocket.cpp
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kernel/Networking/UNIX/Socket.cpp
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@ -1,151 +0,0 @@
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#pragma once
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#include <stdint.h>
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namespace Kernel
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{
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enum RTL8169_IO_REGS : uint16_t
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{
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RTL8169_IO_IDR0 = 0x00,
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RTL8169_IO_IDR1 = 0x01,
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RTL8169_IO_IDR2 = 0x02,
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RTL8169_IO_IDR3 = 0x03,
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RTL8169_IO_IDR4 = 0x04,
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RTL8169_IO_IDR5 = 0x05,
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RTL8169_IO_TNPDS = 0x20,
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RTL8169_IO_CR = 0x37,
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RTL8169_IO_TPPoll = 0x38,
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RTL8169_IO_IMR = 0x3C,
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RTL8169_IO_ISR = 0x3E,
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RTL8169_IO_TCR = 0x40,
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RTL8169_IO_RCR = 0x44,
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RTL8169_IO_9346CR = 0x50,
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RTL8169_IO_PHYSts = 0x6C,
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RTL8169_IO_RMS = 0xDA,
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RTL8169_IO_RDSAR = 0xE4,
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RTL8169_IO_MTPS = 0xEC,
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};
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enum RTL8169_CR : uint8_t
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{
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RTL8169_CR_TE = 1u << 2,
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RTL8169_CR_RE = 1u << 3,
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RTL8169_CR_RST = 1u << 4,
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};
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enum RTL8169_TPPoll : uint8_t
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{
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RTL8169_TPPoll_FSWInt = 1u << 0,
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RTL8169_TPPoll_NPQ = 1u << 6,
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RTL8169_TPPoll_HPQ = 1u << 7,
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};
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enum RTL8169_IR : uint16_t
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{
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RTL8169_IR_ROK = 1u << 0,
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RTL8169_IR_RER = 1u << 1,
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RTL8169_IR_TOK = 1u << 2,
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RTL8169_IR_TER = 1u << 3,
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RTL8169_IR_RDU = 1u << 4,
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RTL8169_IR_LinkChg = 1u << 5,
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RTL8169_IR_FVOW = 1u << 6,
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RTL8169_IR_TDU = 1u << 7,
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RTL8169_IR_SWInt = 1u << 8,
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RTL8169_IR_FEmp = 1u << 9,
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RTL8169_IR_TimeOut = 1u << 14,
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};
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enum RTL8169_TCR : uint32_t
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{
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RTL8169_TCR_MXDMA_16 = 0b000u << 8,
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RTL8169_TCR_MXDMA_32 = 0b001u << 8,
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RTL8169_TCR_MXDMA_64 = 0b010u << 8,
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RTL8169_TCR_MXDMA_128 = 0b011u << 8,
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RTL8169_TCR_MXDMA_256 = 0b100u << 8,
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RTL8169_TCR_MXDMA_512 = 0b101u << 8,
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RTL8169_TCR_MXDMA_1024 = 0b110u << 8,
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RTL8169_TCR_MXDMA_UNLIMITED = 0b111u << 8,
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RTL8169_TCR_TX_NOCRC = 1u << 16,
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RTL8169_TCR_LOOPBACK = 0b01u << 17,
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RTL8169_TCR_IFG_0 = (0u << 19) | (0b11 << 24),
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RTL8169_TCR_IFG_8 = (1u << 19) | (0b01 << 24),
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RTL8169_TCR_IFG_16 = (1u << 19) | (0b11 << 24),
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RTL8169_TCR_IFG_24 = (0u << 19) | (0b01 << 24),
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RTL8169_TCR_IFG_48 = (0u << 19) | (0b10 << 24),
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};
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enum RTL8169_RCR : uint32_t
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{
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RTL8169_RCR_AAP = 1u << 0, // accept all packets with destination
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RTL8169_RCR_APM = 1u << 1, // accept physical matches
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RTL8169_RCR_AM = 1u << 2, // accept multicast
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RTL8169_RCR_AB = 1u << 3, // accept broadcast
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RTL8169_RCR_AR = 1u << 4, // accept runt
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RTL8169_RCR_AER = 1u << 5, // accept error
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RTL8169_RCR_MXDMA_64 = 0b010u << 8,
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RTL8169_RCR_MXDMA_128 = 0b011u << 8,
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RTL8169_RCR_MXDMA_256 = 0b100u << 8,
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RTL8169_RCR_MXDMA_512 = 0b101u << 8,
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RTL8169_RCR_MXDMA_1024 = 0b110u << 8,
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RTL8169_RCR_MXDMA_UNLIMITED = 0b111u << 8,
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RTL8169_RCR_RXFTH_64 = 0b010u << 13,
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RTL8169_RCR_RXFTH_128 = 0b011u << 13,
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RTL8169_RCR_RXFTH_256 = 0b100u << 13,
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RTL8169_RCR_RXFTH_512 = 0b101u << 13,
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RTL8169_RCR_RXFTH_1024 = 0b110u << 13,
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RTL8169_RCR_RXFTH_NO = 0b111u << 13,
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};
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enum RTL8169_9346CR : uint8_t
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{
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RTL8169_9346CR_MODE_NORMAL = 0b00 << 6,
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RTL8169_9346CR_MODE_CONFIG = 0b11 << 6,
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};
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enum RTL8169_PHYSts : uint8_t
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{
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RTL8169_PHYSts_FullDup = 1u << 0,
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RTL8169_PHYSts_LinkSts = 1u << 1,
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RTL8169_PHYSts_10M = 1u << 2,
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RTL8169_PHYSts_100M = 1u << 3,
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RTL8169_PHYSts_1000MF = 1u << 4,
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RTL8169_PHYSts_RxFlow = 1u << 5,
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RTL8169_PHYSts_TxFlow = 1u << 6,
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};
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enum RTL8169_RMS : uint16_t
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{
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// 8192 - 1
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RTL8169_RMS_MAX = 0x1FFF,
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};
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enum RTL8169_MTPS : uint8_t
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{
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RTL8169_MTPS_MAX = 0x3B,
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};
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struct RTL8169Descriptor
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{
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uint32_t command;
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uint32_t vlan;
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uint32_t buffer_low;
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uint32_t buffer_high;
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};
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enum RTL8169DescriptorCommand : uint32_t
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{
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RTL8169_DESC_CMD_LGSEN = 1u << 27,
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RTL8169_DESC_CMD_LS = 1u << 28,
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RTL8169_DESC_CMD_FS = 1u << 29,
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RTL8169_DESC_CMD_EOR = 1u << 30,
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RTL8169_DESC_CMD_OWN = 1u << 31,
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};
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}
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@ -1,75 +0,0 @@
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#pragma once
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#include <BAN/UniqPtr.h>
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#include <kernel/Interruptable.h>
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#include <kernel/Memory/DMARegion.h>
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#include <kernel/Networking/NetworkInterface.h>
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#include <kernel/PCI.h>
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namespace Kernel
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{
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class RTL8169 final : public NetworkInterface, public Interruptable
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{
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public:
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static bool probe(PCI::Device&);
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static BAN::ErrorOr<BAN::RefPtr<RTL8169>> create(PCI::Device&);
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virtual BAN::MACAddress get_mac_address() const override { return m_mac_address; }
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virtual bool link_up() override { return m_link_up; }
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virtual int link_speed() override;
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virtual size_t payload_mtu() const override { return 7436 - sizeof(EthernetHeader); }
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virtual void handle_irq() override;
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protected:
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RTL8169(PCI::Device& pci_device)
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: m_pci_device(pci_device)
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{ }
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BAN::ErrorOr<void> initialize();
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virtual BAN::ErrorOr<void> send_bytes(BAN::MACAddress destination, EtherType protocol, BAN::ConstByteSpan) override;
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virtual bool can_read_impl() const override { return false; }
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virtual bool can_write_impl() const override { return false; }
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virtual bool has_error_impl() const override { return false; }
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private:
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BAN::ErrorOr<void> reset();
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BAN::ErrorOr<void> initialize_rx();
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BAN::ErrorOr<void> initialize_tx();
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void enable_link();
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BAN::ErrorOr<void> enable_interrupt();
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void handle_receive();
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protected:
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PCI::Device& m_pci_device;
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BAN::UniqPtr<PCI::BarRegion> m_io_bar_region;
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private:
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static constexpr size_t m_rx_descriptor_count = 256;
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static constexpr size_t m_tx_descriptor_count = 256;
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BAN::UniqPtr<DMARegion> m_rx_buffer_region;
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BAN::UniqPtr<DMARegion> m_tx_buffer_region;
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BAN::UniqPtr<DMARegion> m_rx_descriptor_region;
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BAN::UniqPtr<DMARegion> m_tx_descriptor_region;
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SpinLock m_lock;
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ThreadBlocker m_thread_blocker;
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uint32_t m_rx_current { 0 };
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size_t m_tx_current { 0 };
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BAN::MACAddress m_mac_address {};
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BAN::Atomic<bool> m_link_up { false };
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friend class BAN::RefPtr<RTL8169>;
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};
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}
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@ -17,11 +17,7 @@ namespace Kernel
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static void panic_impl(const char* location, const char* message, Args&&... args)
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{
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asm volatile("cli");
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const bool had_debug_lock = Debug::s_debug_lock.current_processor_has_lock();
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derrorln("Kernel panic at {}", location);
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if (had_debug_lock)
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derrorln(" while having debug lock...");
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derrorln(message, BAN::forward<Args>(args)...);
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if (!g_paniced)
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{
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@ -92,7 +92,6 @@ namespace Kernel
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};
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Buffer m_output;
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protected:
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RecursiveSpinLock m_write_lock;
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};
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@ -19,7 +19,6 @@ namespace Kernel
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virtual uint64_t ns_since_boot() const override;
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virtual timespec time_since_boot() const override;
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virtual bool pre_scheduler_sleep_needs_lock() const override { return false; }
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virtual void pre_scheduler_sleep_ns(uint64_t) override;
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virtual void handle_irq() override;
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@ -16,7 +16,6 @@ namespace Kernel
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virtual uint64_t ns_since_boot() const override;
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virtual timespec time_since_boot() const override;
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virtual bool pre_scheduler_sleep_needs_lock() const override { return true; }
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virtual void pre_scheduler_sleep_ns(uint64_t) override;
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virtual void handle_irq() override;
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@ -17,7 +17,6 @@ namespace Kernel
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virtual uint64_t ns_since_boot() const = 0;
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virtual timespec time_since_boot() const = 0;
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virtual bool pre_scheduler_sleep_needs_lock() const = 0;
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virtual void pre_scheduler_sleep_ns(uint64_t) = 0;
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void dont_invoke_scheduler() { m_should_invoke_scheduler = false; }
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@ -40,7 +39,6 @@ namespace Kernel
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virtual uint64_t ns_since_boot() const override;
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virtual timespec time_since_boot() const override;
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virtual bool pre_scheduler_sleep_needs_lock() const override;
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virtual void pre_scheduler_sleep_ns(uint64_t) override;
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void sleep_ms(uint64_t ms) const { return sleep_ns(ms * 1'000'000); }
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@ -253,11 +253,11 @@ namespace Kernel
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const auto send_ipi =
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[&](uint8_t processor, uint32_t data, uint64_t ud)
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{
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while ((read_from_local_apic(LAPIC_ICR_LO_REG) & ICR_LO_delivery_status_send_pending) == ICR_LO_delivery_status_send_pending)
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__builtin_ia32_pause();
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write_to_local_apic(LAPIC_ICR_HI_REG, (read_from_local_apic(LAPIC_ICR_HI_REG) & 0x00FFFFFF) | (processor << 24));
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write_to_local_apic(LAPIC_ICR_LO_REG, data);
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udelay(ud);
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while ((read_from_local_apic(LAPIC_ICR_LO_REG) & ICR_LO_delivery_status_send_pending) == ICR_LO_delivery_status_send_pending)
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__builtin_ia32_pause();
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};
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dprintln("System has {} processors", m_processors.size());
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@ -402,26 +402,21 @@ namespace Kernel
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void APIC::initialize_timer()
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{
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ASSERT(Kernel::Processor::get_interrupt_state() == InterruptState::Disabled);
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{
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constexpr uint64_t measuring_duration_ms = 100;
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constexpr uint64_t measuring_duration_ms = 100;
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SpinLockGuard _(s_timer_init_lock);
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const bool needs_lock = SystemTimer::get().pre_scheduler_sleep_needs_lock();
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if (needs_lock)
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s_timer_init_lock.lock();
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write_to_local_apic(LAPIC_TIMER_LVT, TimerModeOneShot | TimerMask);
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write_to_local_apic(LAPIC_TIMER_DIVIDE_REG, DivideBy2);
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write_to_local_apic(LAPIC_TIMER_INITIAL_REG, 0xFFFFFFFF);
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SystemTimer::get().pre_scheduler_sleep_ns(measuring_duration_ms * 1'000'000);
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write_to_local_apic(LAPIC_TIMER_LVT, TimerModeOneShot | TimerMask);
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write_to_local_apic(LAPIC_TIMER_DIVIDE_REG, DivideBy2);
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write_to_local_apic(LAPIC_TIMER_INITIAL_REG, 0xFFFFFFFF);
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SystemTimer::get().pre_scheduler_sleep_ns(measuring_duration_ms * 1'000'000);
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const uint32_t counter = read_from_local_apic(LAPIC_TIMER_CURRENT_REG);
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m_lapic_timer_frequency_hz = static_cast<uint64_t>(0xFFFFFFFF - counter) * 2 * (1000 / measuring_duration_ms);
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const uint32_t counter = read_from_local_apic(LAPIC_TIMER_CURRENT_REG);
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m_lapic_timer_frequency_hz = static_cast<uint64_t>(0xFFFFFFFF - counter) * 2 * (1000 / measuring_duration_ms);
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if (needs_lock)
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s_timer_init_lock.unlock(InterruptState::Disabled);
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dprintln("CPU {}: lapic timer frequency: {} Hz", Kernel::Processor::current_id(), m_lapic_timer_frequency_hz);
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dprintln("CPU {}: lapic timer frequency: {} Hz", Kernel::Processor::current_id(), m_lapic_timer_frequency_hz);
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}
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write_to_local_apic(LAPIC_TIMER_LVT, TimerModePeriodic | (IRQ_VECTOR_BASE + IRQ_TIMER));
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write_to_local_apic(LAPIC_TIMER_INITIAL_REG, m_lapic_timer_frequency_hz / 2 / 100);
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@ -360,8 +360,6 @@ done:
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{
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if (g_paniced)
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{
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while (Debug::s_debug_lock.current_processor_has_lock())
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Debug::s_debug_lock.unlock(InterruptState::Disabled);
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dprintln("Processor {} halted", Processor::current_id());
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if (InterruptController::is_initialized())
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InterruptController::get().broadcast_ipi();
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|
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@ -5,7 +5,6 @@
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#include <kernel/Networking/E1000/E1000E.h>
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#include <kernel/Networking/ICMP.h>
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#include <kernel/Networking/NetworkManager.h>
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#include <kernel/Networking/RTL8169/RTL8169.h>
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#include <kernel/Networking/TCPSocket.h>
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#include <kernel/Networking/UDPSocket.h>
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#include <kernel/Networking/UNIX/Socket.h>
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@ -49,11 +48,6 @@ namespace Kernel
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interface = TRY(E1000E::create(pci_device));
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break;
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}
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if (RTL8169::probe(pci_device))
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{
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interface = TRY(RTL8169::create(pci_device));
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break;
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}
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// fall through
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default:
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dprintln("unsupported network controller (pci {2H}.{2H}.{2H})", pci_device.class_code(), pci_device.subclass(), pci_device.prog_if());
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@ -127,8 +121,6 @@ namespace Kernel
|
|||
|
||||
void NetworkManager::on_receive(NetworkInterface& interface, BAN::ConstByteSpan packet)
|
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{
|
||||
if (packet.size() < sizeof(EthernetHeader))
|
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return;
|
||||
auto ethernet_header = packet.as<const EthernetHeader>();
|
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|
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switch (ethernet_header.ether_type)
|
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|
|
|
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|
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@ -1,295 +0,0 @@
|
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#include <kernel/Networking/NetworkManager.h>
|
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#include <kernel/Networking/RTL8169/Definitions.h>
|
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#include <kernel/Networking/RTL8169/RTL8169.h>
|
||||
#include <kernel/Timer/Timer.h>
|
||||
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
bool RTL8169::probe(PCI::Device& pci_device)
|
||||
{
|
||||
if (pci_device.vendor_id() != 0x10ec)
|
||||
return false;
|
||||
switch (pci_device.device_id())
|
||||
{
|
||||
case 0x8161:
|
||||
case 0x8168:
|
||||
case 0x8169:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
BAN::ErrorOr<BAN::RefPtr<RTL8169>> RTL8169::create(PCI::Device& pci_device)
|
||||
{
|
||||
auto rtl8169 = TRY(BAN::RefPtr<RTL8169>::create(pci_device));
|
||||
TRY(rtl8169->initialize());
|
||||
return rtl8169;
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::initialize()
|
||||
{
|
||||
m_pci_device.enable_bus_mastering();
|
||||
|
||||
m_io_bar_region = TRY(m_pci_device.allocate_bar_region(0));
|
||||
if (m_io_bar_region->type() != PCI::BarType::IO)
|
||||
{
|
||||
dwarnln("RTL8169 BAR0 is not IO space");
|
||||
return BAN::Error::from_errno(EINVAL);
|
||||
}
|
||||
|
||||
dprintln("Initializing RTL8169");
|
||||
|
||||
TRY(reset());
|
||||
|
||||
dprintln(" reset done");
|
||||
|
||||
for (size_t i = 0; i < 6; i++)
|
||||
m_mac_address.address[i] = m_io_bar_region->read8(RTL8169_IO_IDR0 + i);
|
||||
dprintln(" MAC {}", m_mac_address);
|
||||
|
||||
// unlock config registers
|
||||
m_io_bar_region->write8(RTL8169_IO_9346CR, RTL8169_9346CR_MODE_CONFIG);
|
||||
|
||||
TRY(initialize_rx());
|
||||
TRY(initialize_tx());
|
||||
m_io_bar_region->write8(RTL8169_IO_CR, RTL8169_CR_RE | RTL8169_CR_TE);
|
||||
dprintln(" descriptors initialized");
|
||||
|
||||
m_link_up = m_io_bar_region->read8(RTL8169_IO_PHYSts) & RTL8169_PHYSts_LinkSts;
|
||||
if (m_link_up)
|
||||
dprintln(" link speed {}", link_speed());
|
||||
|
||||
TRY(enable_interrupt());
|
||||
dprintln(" interrupts enabled");
|
||||
|
||||
// lock config registers
|
||||
m_io_bar_region->write8(RTL8169_IO_9346CR, RTL8169_9346CR_MODE_NORMAL);
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::reset()
|
||||
{
|
||||
m_io_bar_region->write8(RTL8169_IO_CR, RTL8169_CR_RST);
|
||||
|
||||
const uint64_t timeout_ms = SystemTimer::get().ms_since_boot() + 100;
|
||||
while (m_io_bar_region->read8(RTL8169_IO_CR) & RTL8169_CR_RST)
|
||||
if (SystemTimer::get().ms_since_boot() >= timeout_ms)
|
||||
return BAN::Error::from_errno(ETIMEDOUT);
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::initialize_rx()
|
||||
{
|
||||
// each buffer is 7440 bytes + padding = 8192
|
||||
constexpr size_t buffer_size = 2 * PAGE_SIZE;
|
||||
|
||||
m_rx_buffer_region = TRY(DMARegion::create(m_rx_descriptor_count * buffer_size));
|
||||
m_rx_descriptor_region = TRY(DMARegion::create(m_rx_descriptor_count * sizeof(RTL8169Descriptor)));
|
||||
|
||||
for (size_t i = 0; i < m_rx_descriptor_count; i++)
|
||||
{
|
||||
const paddr_t rx_buffer_paddr = m_rx_buffer_region->paddr() + i * buffer_size;
|
||||
|
||||
uint32_t command = 0x1FF8 | RTL8169_DESC_CMD_OWN;
|
||||
if (i == m_rx_descriptor_count - 1)
|
||||
command |= RTL8169_DESC_CMD_EOR;
|
||||
|
||||
auto& rx_descriptor = reinterpret_cast<volatile RTL8169Descriptor*>(m_rx_descriptor_region->vaddr())[i];
|
||||
rx_descriptor.command = command;
|
||||
rx_descriptor.vlan = 0;
|
||||
rx_descriptor.buffer_low = rx_buffer_paddr & 0xFFFFFFFF;
|
||||
rx_descriptor.buffer_high = rx_buffer_paddr >> 32;
|
||||
}
|
||||
|
||||
// configure rx descriptor addresses
|
||||
m_io_bar_region->write32(RTL8169_IO_RDSAR + 0, m_rx_descriptor_region->paddr() & 0xFFFFFFFF);
|
||||
m_io_bar_region->write32(RTL8169_IO_RDSAR + 4, m_rx_descriptor_region->paddr() >> 32);
|
||||
|
||||
// configure receibe control (no fifo threshold, max dma burst 1024, accept physical match, broadcast, multicast)
|
||||
m_io_bar_region->write32(RTL8169_IO_RCR,
|
||||
RTL8169_RCR_RXFTH_NO | RTL8169_RCR_MXDMA_1024 | RTL8169_RCR_AB | RTL8169_RCR_AM | RTL8169_RCR_APM
|
||||
);
|
||||
|
||||
m_io_bar_region->write32(0x44, 0b111111 | (0b111 << 8) | (0b111 << 13));
|
||||
|
||||
// configure max rx packet size
|
||||
m_io_bar_region->write16(RTL8169_IO_RMS, RTL8169_RMS_MAX);
|
||||
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::initialize_tx()
|
||||
{
|
||||
// each buffer is 7440 bytes + padding = 8192
|
||||
constexpr size_t buffer_size = 2 * PAGE_SIZE;
|
||||
|
||||
m_tx_buffer_region = TRY(DMARegion::create(m_tx_descriptor_count * buffer_size));
|
||||
m_tx_descriptor_region = TRY(DMARegion::create(m_tx_descriptor_count * sizeof(RTL8169Descriptor)));
|
||||
|
||||
for (size_t i = 0; i < m_tx_descriptor_count; i++)
|
||||
{
|
||||
const paddr_t tx_buffer_paddr = m_tx_buffer_region->paddr() + i * buffer_size;
|
||||
|
||||
uint32_t command = 0;
|
||||
if (i == m_tx_descriptor_count - 1)
|
||||
command |= RTL8169_DESC_CMD_EOR;
|
||||
|
||||
auto& tx_descriptor = reinterpret_cast<volatile RTL8169Descriptor*>(m_tx_descriptor_region->vaddr())[i];
|
||||
tx_descriptor.command = command;
|
||||
tx_descriptor.vlan = 0;
|
||||
tx_descriptor.buffer_low = tx_buffer_paddr & 0xFFFFFFFF;
|
||||
tx_descriptor.buffer_high = tx_buffer_paddr >> 32;
|
||||
}
|
||||
|
||||
// configure tx descriptor addresses
|
||||
m_io_bar_region->write32(RTL8169_IO_TNPDS + 0, m_tx_descriptor_region->paddr() & 0xFFFFFFFF);
|
||||
m_io_bar_region->write32(RTL8169_IO_TNPDS + 4, m_tx_descriptor_region->paddr() >> 32);
|
||||
|
||||
// configure transmit control (standard ifg, max dma burst 1024)
|
||||
m_io_bar_region->write32(RTL8169_IO_TCR, RTL8169_TCR_IFG_0 | RTL8169_TCR_MXDMA_1024);
|
||||
|
||||
// configure max tx packet size
|
||||
m_io_bar_region->write8(RTL8169_IO_MTPS, RTL8169_MTPS_MAX);
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::enable_interrupt()
|
||||
{
|
||||
TRY(m_pci_device.reserve_irqs(1));
|
||||
set_irq(m_pci_device.get_irq(0));
|
||||
Interruptable::enable_interrupt();
|
||||
|
||||
m_io_bar_region->write16(RTL8169_IO_IMR,
|
||||
RTL8169_IR_ROK
|
||||
| RTL8169_IR_RER
|
||||
| RTL8169_IR_TOK
|
||||
| RTL8169_IR_TER
|
||||
| RTL8169_IR_RDU
|
||||
| RTL8169_IR_LinkChg
|
||||
| RTL8169_IR_FVOW
|
||||
| RTL8169_IR_TDU
|
||||
);
|
||||
m_io_bar_region->write16(RTL8169_IO_ISR, 0xFFFF);
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
int RTL8169::link_speed()
|
||||
{
|
||||
if (!link_up())
|
||||
return 0;
|
||||
const uint8_t phy_status = m_io_bar_region->read8(RTL8169_IO_PHYSts);
|
||||
if (phy_status & RTL8169_PHYSts_1000MF)
|
||||
return 1000;
|
||||
if (phy_status & RTL8169_PHYSts_100M)
|
||||
return 100;
|
||||
if (phy_status & RTL8169_PHYSts_10M)
|
||||
return 10;
|
||||
return 0;
|
||||
}
|
||||
|
||||
BAN::ErrorOr<void> RTL8169::send_bytes(BAN::MACAddress destination, EtherType protocol, BAN::ConstByteSpan buffer)
|
||||
{
|
||||
constexpr size_t buffer_size = 8192;
|
||||
|
||||
const uint16_t packet_size = sizeof(EthernetHeader) + buffer.size();
|
||||
if (packet_size > buffer_size)
|
||||
return BAN::Error::from_errno(EINVAL);
|
||||
|
||||
if (!link_up())
|
||||
return BAN::Error::from_errno(EADDRNOTAVAIL);
|
||||
|
||||
auto state = m_lock.lock();
|
||||
const uint32_t tx_current = m_tx_current;
|
||||
m_tx_current = (m_tx_current + 1) % m_tx_descriptor_count;
|
||||
m_lock.unlock(state);
|
||||
|
||||
auto& descriptor = reinterpret_cast<volatile RTL8169Descriptor*>(m_tx_descriptor_region->vaddr())[tx_current];
|
||||
while (descriptor.command & RTL8169_DESC_CMD_OWN)
|
||||
m_thread_blocker.block_with_timeout_ms(100);
|
||||
|
||||
auto* tx_buffer = reinterpret_cast<uint8_t*>(m_tx_buffer_region->vaddr() + tx_current * buffer_size);
|
||||
|
||||
// write packet
|
||||
auto& ethernet_header = *reinterpret_cast<EthernetHeader*>(tx_buffer);
|
||||
ethernet_header.dst_mac = destination;
|
||||
ethernet_header.src_mac = get_mac_address();
|
||||
ethernet_header.ether_type = protocol;
|
||||
memcpy(tx_buffer + sizeof(EthernetHeader), buffer.data(), buffer.size());
|
||||
|
||||
// give packet ownership to NIC
|
||||
uint32_t command = packet_size | RTL8169_DESC_CMD_OWN | RTL8169_DESC_CMD_LS | RTL8169_DESC_CMD_FS;
|
||||
if (tx_current >= m_tx_descriptor_count - 1)
|
||||
command |= RTL8169_DESC_CMD_EOR;
|
||||
descriptor.command = command;
|
||||
|
||||
// notify NIC about new packet
|
||||
m_io_bar_region->write8(RTL8169_IO_TPPoll, RTL8169_TPPoll_NPQ);
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
void RTL8169::handle_irq()
|
||||
{
|
||||
const uint16_t interrupt_status = m_io_bar_region->read16(RTL8169_IO_ISR);
|
||||
m_io_bar_region->write16(RTL8169_IO_ISR, interrupt_status);
|
||||
|
||||
if (interrupt_status & RTL8169_IR_LinkChg)
|
||||
{
|
||||
m_link_up = m_io_bar_region->read8(RTL8169_IO_PHYSts) & RTL8169_PHYSts_LinkSts;
|
||||
dprintln("link status -> {}", m_link_up.load());
|
||||
}
|
||||
|
||||
if (interrupt_status & RTL8169_IR_TOK)
|
||||
m_thread_blocker.unblock();
|
||||
|
||||
if (interrupt_status & RTL8169_IR_RER)
|
||||
dwarnln("Rx error");
|
||||
if (interrupt_status & RTL8169_IR_TER)
|
||||
dwarnln("Tx error");
|
||||
if (interrupt_status & RTL8169_IR_RDU)
|
||||
dwarnln("Rx descriptor not available");
|
||||
if (interrupt_status & RTL8169_IR_FVOW)
|
||||
dwarnln("Rx FIFO overflow");
|
||||
// dont log TDU is sent after each sent packet
|
||||
|
||||
if (!(interrupt_status & RTL8169_IR_ROK))
|
||||
return;
|
||||
|
||||
constexpr size_t buffer_size = 8192;
|
||||
|
||||
for (;;)
|
||||
{
|
||||
auto& descriptor = reinterpret_cast<volatile RTL8169Descriptor*>(m_rx_descriptor_region->vaddr())[m_rx_current];
|
||||
if (descriptor.command & RTL8169_DESC_CMD_OWN)
|
||||
break;
|
||||
|
||||
// packet buffer can only hold single packet, so we should not receive any multi-descriptor packets
|
||||
ASSERT((descriptor.command & RTL8169_DESC_CMD_LS) && (descriptor.command & RTL8169_DESC_CMD_FS));
|
||||
|
||||
const uint16_t packet_length = descriptor.command & 0x3FFF;
|
||||
if (packet_length > buffer_size)
|
||||
dwarnln("Got {} bytes to {} byte buffer", packet_length, buffer_size);
|
||||
else if (descriptor.command & (1u << 21))
|
||||
; // descriptor has an error
|
||||
else
|
||||
{
|
||||
NetworkManager::get().on_receive(*this, BAN::ConstByteSpan {
|
||||
reinterpret_cast<const uint8_t*>(m_rx_buffer_region->vaddr() + m_rx_current * buffer_size),
|
||||
packet_length
|
||||
});
|
||||
}
|
||||
|
||||
m_rx_current = (m_rx_current + 1) % m_rx_descriptor_count;
|
||||
|
||||
descriptor.command = descriptor.command | RTL8169_DESC_CMD_OWN;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -49,7 +49,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::clear()
|
||||
{
|
||||
SpinLockGuard _(m_write_lock);
|
||||
for (uint32_t i = 0; i < m_width * m_height; i++)
|
||||
m_buffer[i] = { .foreground = m_foreground, .background = m_background, .codepoint = ' ' };
|
||||
m_terminal_driver->clear(m_background);
|
||||
|
|
@ -57,8 +56,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::set_font(const LibFont::Font& font)
|
||||
{
|
||||
SpinLockGuard _(m_write_lock);
|
||||
|
||||
m_terminal_driver->set_font(font);
|
||||
|
||||
uint32_t new_width = m_terminal_driver->width();
|
||||
|
|
@ -89,7 +86,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::set_cursor_position(uint32_t x, uint32_t y)
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
static uint32_t last_x = -1;
|
||||
static uint32_t last_y = -1;
|
||||
if (last_x != uint32_t(-1) && last_y != uint32_t(-1))
|
||||
|
|
@ -102,7 +98,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::reset_ansi()
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
m_ansi_state.index = 0;
|
||||
m_ansi_state.nums[0] = -1;
|
||||
m_ansi_state.nums[1] = -1;
|
||||
|
|
@ -112,7 +107,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::handle_ansi_csi_color()
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
switch (m_ansi_state.nums[0])
|
||||
{
|
||||
case -1:
|
||||
|
|
@ -161,7 +155,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::handle_ansi_csi(uint8_t ch)
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
switch (ch)
|
||||
{
|
||||
case '0': case '1': case '2': case '3': case '4':
|
||||
|
|
@ -367,7 +360,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::render_from_buffer(uint32_t x, uint32_t y)
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
ASSERT(x < m_width && y < m_height);
|
||||
const auto& cell = m_buffer[y * m_width + x];
|
||||
m_terminal_driver->putchar_at(cell.codepoint, x, y, cell.foreground, cell.background);
|
||||
|
|
@ -375,7 +367,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::putchar_at(uint32_t codepoint, uint32_t x, uint32_t y)
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
ASSERT(x < m_width && y < m_height);
|
||||
auto& cell = m_buffer[y * m_width + x];
|
||||
cell.codepoint = codepoint;
|
||||
|
|
@ -386,8 +377,6 @@ namespace Kernel
|
|||
|
||||
void VirtualTTY::putchar_impl(uint8_t ch)
|
||||
{
|
||||
ASSERT(m_write_lock.current_processor_has_lock());
|
||||
|
||||
uint32_t codepoint = ch;
|
||||
|
||||
switch (m_state)
|
||||
|
|
|
|||
|
|
@ -69,11 +69,6 @@ namespace Kernel
|
|||
return m_timer->time_since_boot();
|
||||
}
|
||||
|
||||
bool SystemTimer::pre_scheduler_sleep_needs_lock() const
|
||||
{
|
||||
return m_timer->pre_scheduler_sleep_needs_lock();
|
||||
}
|
||||
|
||||
void SystemTimer::pre_scheduler_sleep_ns(uint64_t ns)
|
||||
{
|
||||
return m_timer->pre_scheduler_sleep_ns(ns);
|
||||
|
|
|
|||
Loading…
Reference in New Issue