Compare commits
3 Commits
7ce8e2d57b
...
bcf62c5f2e
Author | SHA1 | Date |
---|---|---|
Bananymous | bcf62c5f2e | |
Bananymous | 4d6322ff9c | |
Bananymous | 2eef581737 |
|
@ -8,16 +8,14 @@ endif()
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set(TOOLCHAIN_PREFIX ${CMAKE_SOURCE_DIR}/toolchain/local)
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set(CMAKE_CXX_STANDARD 20)
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set(CMAKE_CXX_STANDARD_REQUIRED True)
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set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}/bin/${BANAN_ARCH}-banan_os-g++)
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set(CMAKE_CXX_COMPILER_WORKS True)
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if(EXISTS ${TOOLCHAIN_PREFIX}/bin/${BANAN_ARCH}-banan_os-g++)
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set(CMAKE_CXX_STANDARD 20)
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set(CMAKE_CXX_STANDARD_REQUIRED True)
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set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}/bin/${BANAN_ARCH}-banan_os-g++)
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set(CMAKE_CXX_COMPILER_WORKS True)
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set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}/bin/${BANAN_ARCH}-banan_os-gcc)
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set(CMAKE_C_COMPILER_WORKS True)
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if(NOT EXISTS ${CMAKE_CXX_COMPILER})
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set(CMAKE_CXX_COMPILER g++)
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set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}/bin/${BANAN_ARCH}-banan_os-gcc)
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set(CMAKE_C_COMPILER_WORKS True)
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endif()
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if(DEFINED QEMU_ACCEL)
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@ -194,10 +194,10 @@ add_custom_command(
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COMMAND cp ${CRTEND} .
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)
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add_custom_command(
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TARGET kernel POST_BUILD
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COMMAND x86_64-banan_os-strip ${CMAKE_CURRENT_BINARY_DIR}/kernel
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)
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#add_custom_command(
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# TARGET kernel POST_BUILD
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# COMMAND x86_64-banan_os-strip ${CMAKE_CURRENT_BINARY_DIR}/kernel
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#)
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add_custom_command(
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OUTPUT font/prefs.psf.o
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@ -13,7 +13,7 @@
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#define REGISTER_ISR_HANDLER(i) register_interrupt_handler(i, isr ## i)
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#define REGISTER_IRQ_HANDLER(i) register_interrupt_handler(IRQ_VECTOR_BASE + i, irq ## i)
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namespace IDT
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namespace Kernel::IDT
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{
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struct Registers
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@ -63,7 +63,7 @@ namespace IDT
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static IDTR s_idtr;
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static GateDescriptor* s_idt = nullptr;
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static void(*s_irq_handlers[0x10])() { nullptr };
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static Interruptable* s_interruptables[0x10] {};
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enum ISR
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{
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@ -160,53 +160,62 @@ namespace IDT
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"Unkown Exception 0x1F",
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};
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extern "C" void cpp_isr_handler(uint64_t isr, uint64_t error, Kernel::InterruptStack& interrupt_stack, const Registers* regs)
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extern "C" void cpp_isr_handler(uint64_t isr, uint64_t error, InterruptStack& interrupt_stack, const Registers* regs)
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{
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#if __enable_sse
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bool from_userspace = (interrupt_stack.cs & 0b11) == 0b11;
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if (from_userspace)
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Kernel::Thread::current().save_sse();
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Thread::current().save_sse();
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#endif
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pid_t tid = Kernel::Scheduler::current_tid();
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pid_t pid = tid ? Kernel::Process::current().pid() : 0;
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pid_t tid = Scheduler::current_tid();
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pid_t pid = tid ? Process::current().pid() : 0;
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if (pid && isr == ISR::PageFault)
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if (tid)
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{
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PageFaultError page_fault_error;
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page_fault_error.raw = error;
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Thread::current().set_return_rsp(interrupt_stack.rsp);
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Thread::current().set_return_rip(interrupt_stack.rip);
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if (isr == ISR::PageFault)
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{
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// Check if stack is OOB
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auto& stack = Thread::current().stack();
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if (interrupt_stack.rsp < stack.vaddr())
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{
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derrorln("Stack overflow");
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goto done;
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}
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if (interrupt_stack.rsp >= stack.vaddr() + stack.size())
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{
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derrorln("Stack underflow");
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goto done;
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}
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// Try demand paging on non present pages
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PageFaultError page_fault_error;
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page_fault_error.raw = error;
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if (!page_fault_error.present)
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{
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asm volatile("sti");
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auto result = Kernel::Process::current().allocate_page_for_demand_paging(regs->cr2);
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auto result = Process::current().allocate_page_for_demand_paging(regs->cr2);
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asm volatile("cli");
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if (!result.is_error() && result.value())
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return;
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goto done;
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if (result.is_error())
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{
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dwarnln("Demand paging: {}", result.error());
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Kernel::Thread::current().handle_signal(SIGTERM);
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Thread::current().handle_signal(SIGTERM);
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goto done;
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}
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}
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}
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}
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if (tid)
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if (PageTable::current().get_page_flags(interrupt_stack.rip & PAGE_ADDR_MASK) & PageTable::Flags::Present)
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{
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auto start = Kernel::Thread::current().stack_base();
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auto end = start + Kernel::Thread::current().stack_size();
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if (interrupt_stack.rsp < start)
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derrorln("Stack overflow");
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if (interrupt_stack.rsp >= end)
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derrorln("Stack underflow");
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}
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if (Kernel::PageTable::current().get_page_flags(interrupt_stack.rip & PAGE_ADDR_MASK) & Kernel::PageTable::Flags::Present)
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{
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uint8_t* machine_code = (uint8_t*)interrupt_stack.rip;
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auto* machine_code = (const uint8_t*)interrupt_stack.rip;
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dwarnln("While executing: {2H}{2H}{2H}{2H}{2H}{2H}{2H}{2H}",
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machine_code[0],
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machine_code[1],
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@ -233,16 +242,10 @@ namespace IDT
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regs->cr0, regs->cr2, regs->cr3, regs->cr4
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);
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if (isr == ISR::PageFault)
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Kernel::PageTable::current().debug_dump();
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PageTable::current().debug_dump();
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Debug::dump_stack_trace();
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if (tid)
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{
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Kernel::Thread::current().set_return_rsp(interrupt_stack.rsp);
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Kernel::Thread::current().set_return_rip(interrupt_stack.rip);
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}
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if (tid && Kernel::Thread::current().is_userspace())
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if (tid && Thread::current().is_userspace())
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{
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// TODO: Confirm and fix the exception to signal mappings
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@ -270,36 +273,38 @@ namespace IDT
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break;
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}
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Kernel::Thread::current().handle_signal(signal);
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Thread::current().handle_signal(signal);
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}
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else
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{
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Kernel::panic("Unhandled exception");
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panic("Unhandled exception");
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}
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ASSERT(Kernel::Thread::current().state() != Kernel::Thread::State::Terminated);
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ASSERT(Thread::current().state() != Thread::State::Terminated);
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done:
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#if __enable_sse
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if (from_userspace)
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{
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ASSERT(Kernel::Thread::current().state() == Kernel::Thread::State::Executing);
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Kernel::Thread::current().load_sse();
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ASSERT(Thread::current().state() == Thread::State::Executing);
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Thread::current().load_sse();
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}
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#endif
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return;
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}
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extern "C" void cpp_irq_handler(uint64_t irq, Kernel::InterruptStack& interrupt_stack)
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extern "C" void cpp_irq_handler(uint64_t irq, InterruptStack& interrupt_stack)
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{
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#if __enable_sse
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bool from_userspace = (interrupt_stack.cs & 0b11) == 0b11;
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if (from_userspace)
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Kernel::Thread::current().save_sse();
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Thread::current().save_sse();
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#endif
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if (Kernel::Scheduler::current_tid())
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if (Scheduler::current_tid())
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{
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Kernel::Thread::current().set_return_rsp(interrupt_stack.rsp);
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Kernel::Thread::current().set_return_rip(interrupt_stack.rip);
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Thread::current().set_return_rsp(interrupt_stack.rsp);
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Thread::current().set_return_rip(interrupt_stack.rip);
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}
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if (!InterruptController::get().is_in_service(irq))
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@ -307,21 +312,21 @@ namespace IDT
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else
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{
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InterruptController::get().eoi(irq);
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if (s_irq_handlers[irq])
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s_irq_handlers[irq]();
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if (s_interruptables[irq])
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s_interruptables[irq]->handle_irq();
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else
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dprintln("no handler for irq 0x{2H}\n", irq);
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}
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Kernel::Scheduler::get().reschedule_if_idling();
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Scheduler::get().reschedule_if_idling();
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ASSERT(Kernel::Thread::current().state() != Kernel::Thread::State::Terminated);
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ASSERT(Thread::current().state() != Thread::State::Terminated);
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#if __enable_sse
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if (from_userspace)
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{
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ASSERT(Kernel::Thread::current().state() == Kernel::Thread::State::Executing);
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Kernel::Thread::current().load_sse();
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ASSERT(Thread::current().state() == Thread::State::Executing);
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Thread::current().load_sse();
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}
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#endif
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}
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@ -349,9 +354,9 @@ namespace IDT
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s_idt[index].flags = 0xEE;
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}
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void register_irq_handler(uint8_t irq, void(*handler)())
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void register_irq_handler(uint8_t irq, Interruptable* interruptable)
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{
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s_irq_handlers[irq] = handler;
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s_interruptables[irq] = interruptable;
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}
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extern "C" void isr0();
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@ -4,23 +4,26 @@
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#include <kernel/InterruptController.h>
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#include <kernel/Memory/Types.h>
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class APIC final : public InterruptController
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namespace Kernel
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{
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public:
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class APIC final : public InterruptController
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{
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public:
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virtual void eoi(uint8_t) override;
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virtual void enable_irq(uint8_t) override;
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virtual bool is_in_service(uint8_t) override;
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private:
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private:
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uint32_t read_from_local_apic(ptrdiff_t);
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void write_to_local_apic(ptrdiff_t, uint32_t);
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private:
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private:
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~APIC() { ASSERT_NOT_REACHED(); }
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static APIC* create();
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friend class InterruptController;
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private:
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private:
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struct Processor
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{
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enum Flags : uint8_t
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@ -45,10 +48,12 @@ private:
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void write(uint8_t offset, uint32_t data);
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};
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private:
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private:
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BAN::Vector<Processor> m_processors;
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Kernel::paddr_t m_local_apic_paddr = 0;
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Kernel::vaddr_t m_local_apic_vaddr = 0;
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BAN::Vector<IOAPIC> m_io_apics;
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uint8_t m_irq_overrides[0x100] {};
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};
|
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};
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}
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|
|
|
@ -4,11 +4,10 @@
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constexpr uint8_t IRQ_VECTOR_BASE = 0x20;
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namespace IDT
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namespace Kernel::IDT
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{
|
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|
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void initialize();
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void register_irq_handler(uint8_t irq, void(*f)());
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[[noreturn]] void force_triple_fault();
|
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|
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}
|
|
@ -0,0 +1,97 @@
|
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#pragma once
|
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|
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#include <stdint.h>
|
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|
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namespace Kernel::Input::PS2
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{
|
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|
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enum IOPort : uint8_t
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{
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DATA = 0x60,
|
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STATUS = 0x64,
|
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COMMAND = 0x64,
|
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};
|
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|
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enum Status : uint8_t
|
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{
|
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OUTPUT_FULL = (1 << 0),
|
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INPUT_FULL = (1 << 1),
|
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SYSTEM = (1 << 2),
|
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DEVICE_OR_CONTROLLER = (1 << 3),
|
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TIMEOUT_ERROR = (1 << 6),
|
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PARITY_ERROR = (1 << 7),
|
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};
|
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|
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enum Config : uint8_t
|
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{
|
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INTERRUPT_FIRST_PORT = (1 << 0),
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INTERRUPT_SECOND_PORT = (1 << 1),
|
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SYSTEM_FLAG = (1 << 2),
|
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ZERO1 = (1 << 3),
|
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CLOCK_FIRST_PORT = (1 << 4),
|
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CLOCK_SECOND_PORT = (1 << 5),
|
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TRANSLATION_FIRST_PORT = (1 << 6),
|
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ZERO2 = (1 << 7),
|
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};
|
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|
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enum Command : uint8_t
|
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{
|
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READ_CONFIG = 0x20,
|
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WRITE_CONFIG = 0x60,
|
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DISABLE_SECOND_PORT = 0xA7,
|
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ENABLE_SECOND_PORT = 0xA8,
|
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TEST_SECOND_PORT = 0xA9,
|
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TEST_CONTROLLER = 0xAA,
|
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TEST_FIRST_PORT = 0xAB,
|
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DISABLE_FIRST_PORT = 0xAD,
|
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ENABLE_FIRST_PORT = 0xAE,
|
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WRITE_TO_SECOND_PORT = 0xD4,
|
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};
|
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|
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enum Response : uint8_t
|
||||
{
|
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TEST_FIRST_PORT_PASS = 0x00,
|
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TEST_SECOND_PORT_PASS = 0x00,
|
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TEST_CONTROLLER_PASS = 0x55,
|
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SELF_TEST_PASS = 0xAA,
|
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ACK = 0xFA,
|
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};
|
||||
|
||||
enum DeviceCommand : uint8_t
|
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{
|
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ENABLE_SCANNING = 0xF4,
|
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DISABLE_SCANNING = 0xF5,
|
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IDENTIFY = 0xF2,
|
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RESET = 0xFF,
|
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};
|
||||
|
||||
enum IRQ : uint8_t
|
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{
|
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DEVICE0 = 1,
|
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DEVICE1 = 12,
|
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};
|
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|
||||
enum KBResponse : uint8_t
|
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{
|
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KEY_ERROR_OR_BUFFER_OVERRUN1 = 0x00,
|
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SELF_TEST_PASSED = 0xAA,
|
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ECHO_RESPONSE = 0xEE,
|
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RESEND = 0xFE,
|
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KEY_ERROR_OR_BUFFER_OVERRUN2 = 0xFF,
|
||||
};
|
||||
|
||||
enum KBScancode : uint8_t
|
||||
{
|
||||
SET_SCANCODE_SET1 = 1,
|
||||
SET_SCANCODE_SET2 = 2,
|
||||
SET_SCANCODE_SET3 = 3,
|
||||
};
|
||||
|
||||
enum KBLeds : uint8_t
|
||||
{
|
||||
SCROLL_LOCK = (1 << 0),
|
||||
NUM_LOCK = (1 << 1),
|
||||
CAPS_LOCK = (1 << 2),
|
||||
};
|
||||
|
||||
}
|
|
@ -1,15 +1,15 @@
|
|||
#pragma once
|
||||
|
||||
#include <kernel/Device/Device.h>
|
||||
#include <kernel/InterruptController.h>
|
||||
|
||||
namespace Kernel::Input
|
||||
{
|
||||
|
||||
class PS2Device : public CharacterDevice
|
||||
class PS2Device : public CharacterDevice, public Interruptable
|
||||
{
|
||||
public:
|
||||
virtual ~PS2Device() {}
|
||||
virtual void on_byte(uint8_t) = 0;
|
||||
|
||||
public:
|
||||
PS2Device()
|
||||
|
@ -33,9 +33,6 @@ namespace Kernel::Input
|
|||
BAN::ErrorOr<void> reset_device(uint8_t);
|
||||
BAN::ErrorOr<void> set_scanning(uint8_t, bool);
|
||||
|
||||
static void device0_irq();
|
||||
static void device1_irq();
|
||||
|
||||
private:
|
||||
PS2Device* m_devices[2] { nullptr, nullptr };
|
||||
};
|
||||
|
|
|
@ -29,7 +29,7 @@ namespace Kernel::Input
|
|||
public:
|
||||
static BAN::ErrorOr<PS2Keyboard*> create(PS2Controller&);
|
||||
|
||||
virtual void on_byte(uint8_t) override;
|
||||
virtual void handle_irq() override;
|
||||
virtual void update() override;
|
||||
|
||||
private:
|
||||
|
|
|
@ -5,9 +5,27 @@
|
|||
#define DISABLE_INTERRUPTS() asm volatile("cli")
|
||||
#define ENABLE_INTERRUPTS() asm volatile("sti")
|
||||
|
||||
class InterruptController
|
||||
namespace Kernel
|
||||
{
|
||||
public:
|
||||
|
||||
class Interruptable
|
||||
{
|
||||
public:
|
||||
Interruptable() = default;
|
||||
|
||||
void set_irq(int irq);
|
||||
void enable_interrupt();
|
||||
void disable_interrupt();
|
||||
|
||||
virtual void handle_irq() = 0;
|
||||
|
||||
private:
|
||||
int m_irq { -1 };
|
||||
};
|
||||
|
||||
class InterruptController
|
||||
{
|
||||
public:
|
||||
virtual ~InterruptController() {}
|
||||
|
||||
virtual void eoi(uint8_t) = 0;
|
||||
|
@ -19,8 +37,10 @@ public:
|
|||
|
||||
void enter_acpi_mode();
|
||||
|
||||
private:
|
||||
private:
|
||||
bool m_using_apic { false };
|
||||
};
|
||||
};
|
||||
|
||||
bool interrupts_enabled();
|
||||
bool interrupts_enabled();
|
||||
|
||||
}
|
|
@ -2,9 +2,12 @@
|
|||
|
||||
#include <kernel/InterruptController.h>
|
||||
|
||||
class PIC final : public InterruptController
|
||||
namespace Kernel
|
||||
{
|
||||
public:
|
||||
|
||||
class PIC final : public InterruptController
|
||||
{
|
||||
public:
|
||||
virtual void eoi(uint8_t) override;
|
||||
virtual void enable_irq(uint8_t) override;
|
||||
virtual bool is_in_service(uint8_t) override;
|
||||
|
@ -12,7 +15,9 @@ public:
|
|||
static void remap();
|
||||
static void mask_all();
|
||||
|
||||
private:
|
||||
private:
|
||||
static PIC* create();
|
||||
friend class InterruptController;
|
||||
};
|
||||
};
|
||||
|
||||
}
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
#pragma once
|
||||
|
||||
#include <BAN/Errors.h>
|
||||
#include <kernel/InterruptController.h>
|
||||
#include <kernel/SpinLock.h>
|
||||
#include <kernel/Storage/ATAController.h>
|
||||
|
||||
|
@ -9,7 +10,7 @@ namespace Kernel
|
|||
|
||||
class ATADevice;
|
||||
|
||||
class ATABus
|
||||
class ATABus : public Interruptable
|
||||
{
|
||||
public:
|
||||
enum class DeviceType
|
||||
|
@ -27,7 +28,7 @@ namespace Kernel
|
|||
|
||||
ATAController& controller() { return m_controller; }
|
||||
|
||||
void on_irq();
|
||||
virtual void handle_irq() override;
|
||||
|
||||
private:
|
||||
ATABus(ATAController& controller, uint16_t base, uint16_t ctrl)
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#pragma once
|
||||
|
||||
#include <BAN/CircularQueue.h>
|
||||
#include <BAN/Errors.h>
|
||||
#include <kernel/InterruptController.h>
|
||||
#include <kernel/Terminal/TTY.h>
|
||||
|
||||
namespace Kernel
|
||||
|
@ -34,7 +36,7 @@ namespace Kernel
|
|||
uint32_t m_height { 0 };
|
||||
};
|
||||
|
||||
class SerialTTY final : public TTY
|
||||
class SerialTTY final : public TTY, public Interruptable
|
||||
{
|
||||
public:
|
||||
static BAN::ErrorOr<BAN::RefPtr<SerialTTY>> create(Serial);
|
||||
|
@ -45,6 +47,8 @@ namespace Kernel
|
|||
|
||||
virtual void update() override;
|
||||
|
||||
virtual void handle_irq() override;
|
||||
|
||||
protected:
|
||||
virtual BAN::StringView name() const override { return m_name; }
|
||||
|
||||
|
@ -55,6 +59,7 @@ namespace Kernel
|
|||
private:
|
||||
BAN::String m_name;
|
||||
Serial m_serial;
|
||||
BAN::CircularQueue<uint8_t, 128> m_input;
|
||||
|
||||
public:
|
||||
virtual dev_t rdev() const override { return m_rdev; }
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
#pragma once
|
||||
|
||||
#include <kernel/InterruptController.h>
|
||||
#include <kernel/Timer/Timer.h>
|
||||
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
class HPET final : public Timer
|
||||
class HPET final : public Timer, public Interruptable
|
||||
{
|
||||
public:
|
||||
static BAN::ErrorOr<BAN::UniqPtr<HPET>> create(bool force_pic);
|
||||
|
@ -13,6 +14,8 @@ namespace Kernel
|
|||
virtual uint64_t ms_since_boot() const override;
|
||||
virtual timespec time_since_boot() const override;
|
||||
|
||||
virtual void handle_irq() override;
|
||||
|
||||
private:
|
||||
HPET() = default;
|
||||
BAN::ErrorOr<void> initialize(bool force_pic);
|
||||
|
|
|
@ -1,14 +1,12 @@
|
|||
#pragma once
|
||||
|
||||
#include <kernel/InterruptController.h>
|
||||
#include <kernel/Timer/Timer.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#define PIT_IRQ 0
|
||||
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
class PIT final : public Timer
|
||||
class PIT final : public Timer, public Interruptable
|
||||
{
|
||||
public:
|
||||
static BAN::ErrorOr<BAN::UniqPtr<PIT>> create();
|
||||
|
@ -16,8 +14,13 @@ namespace Kernel
|
|||
virtual uint64_t ms_since_boot() const override;
|
||||
virtual timespec time_since_boot() const override;
|
||||
|
||||
virtual void handle_irq() override;
|
||||
|
||||
private:
|
||||
void initialize();
|
||||
|
||||
private:
|
||||
volatile uint64_t m_system_time { 0 };
|
||||
};
|
||||
|
||||
}
|
|
@ -20,14 +20,17 @@
|
|||
|
||||
// https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#multiple-apic-description-table-madt-format
|
||||
|
||||
struct MADT : public Kernel::ACPI::SDTHeader
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
struct MADT : public Kernel::ACPI::SDTHeader
|
||||
{
|
||||
uint32_t local_apic;
|
||||
uint32_t flags;
|
||||
} __attribute__((packed));
|
||||
} __attribute__((packed));
|
||||
|
||||
struct MADTEntry
|
||||
{
|
||||
struct MADTEntry
|
||||
{
|
||||
uint8_t type;
|
||||
uint8_t length;
|
||||
union
|
||||
|
@ -58,10 +61,10 @@ struct MADTEntry
|
|||
uint64_t address;
|
||||
} __attribute__((packed)) entry5;
|
||||
};
|
||||
} __attribute__((packed));
|
||||
} __attribute__((packed));
|
||||
|
||||
union RedirectionEntry
|
||||
{
|
||||
union RedirectionEntry
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint64_t vector : 8;
|
||||
|
@ -80,12 +83,10 @@ union RedirectionEntry
|
|||
uint32_t lo_dword;
|
||||
uint32_t hi_dword;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
using namespace Kernel;
|
||||
|
||||
APIC* APIC::create()
|
||||
{
|
||||
APIC* APIC::create()
|
||||
{
|
||||
uint32_t ecx, edx;
|
||||
CPUID::get_features(ecx, edx);
|
||||
if (!(edx & CPUID::Features::EDX_APIC))
|
||||
|
@ -181,47 +182,47 @@ APIC* APIC::create()
|
|||
uint32_t sivr = apic->read_from_local_apic(LAPIC_SIV_REG);
|
||||
apic->write_to_local_apic(LAPIC_SIV_REG, sivr | 0x1FF);
|
||||
|
||||
#if DEBUG_PRINT_PROCESSORS
|
||||
#if DEBUG_PRINT_PROCESSORS
|
||||
for (auto& processor : apic->m_processors)
|
||||
{
|
||||
dprintln("Processor{}", processor.processor_id);
|
||||
dprintln(" lapic id: {}", processor.apic_id);
|
||||
dprintln(" status: {}", (processor.flags & Processor::Flags::Enabled) ? "enabled" : (processor.flags & Processor::Flags::OnlineCapable) ? "can be enabled" : "disabled");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return apic;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t APIC::read_from_local_apic(ptrdiff_t offset)
|
||||
{
|
||||
uint32_t APIC::read_from_local_apic(ptrdiff_t offset)
|
||||
{
|
||||
return MMIO::read32(m_local_apic_vaddr + offset);
|
||||
}
|
||||
}
|
||||
|
||||
void APIC::write_to_local_apic(ptrdiff_t offset, uint32_t data)
|
||||
{
|
||||
void APIC::write_to_local_apic(ptrdiff_t offset, uint32_t data)
|
||||
{
|
||||
MMIO::write32(m_local_apic_vaddr + offset, data);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t APIC::IOAPIC::read(uint8_t offset)
|
||||
{
|
||||
uint32_t APIC::IOAPIC::read(uint8_t offset)
|
||||
{
|
||||
MMIO::write32(vaddr, offset);
|
||||
return MMIO::read32(vaddr + 16);
|
||||
}
|
||||
}
|
||||
|
||||
void APIC::IOAPIC::write(uint8_t offset, uint32_t data)
|
||||
{
|
||||
void APIC::IOAPIC::write(uint8_t offset, uint32_t data)
|
||||
{
|
||||
MMIO::write32(vaddr, offset);
|
||||
MMIO::write32(vaddr + 16, data);
|
||||
}
|
||||
}
|
||||
|
||||
void APIC::eoi(uint8_t)
|
||||
{
|
||||
void APIC::eoi(uint8_t)
|
||||
{
|
||||
write_to_local_apic(LAPIC_EIO_REG, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void APIC::enable_irq(uint8_t irq)
|
||||
{
|
||||
void APIC::enable_irq(uint8_t irq)
|
||||
{
|
||||
uint32_t gsi = m_irq_overrides[irq];
|
||||
|
||||
IOAPIC* ioapic = nullptr;
|
||||
|
@ -246,13 +247,15 @@ void APIC::enable_irq(uint8_t irq)
|
|||
|
||||
ioapic->write(IOAPIC_REDIRS + gsi * 2, redir.lo_dword);
|
||||
ioapic->write(IOAPIC_REDIRS + gsi * 2 + 1, redir.hi_dword);
|
||||
}
|
||||
}
|
||||
|
||||
bool APIC::is_in_service(uint8_t irq)
|
||||
{
|
||||
bool APIC::is_in_service(uint8_t irq)
|
||||
{
|
||||
uint32_t dword = (irq + IRQ_VECTOR_BASE) / 32;
|
||||
uint32_t bit = (irq + IRQ_VECTOR_BASE) % 32;
|
||||
|
||||
uint32_t isr = read_from_local_apic(LAPIC_IS_REG + dword * 0x10);
|
||||
return isr & (1 << bit);
|
||||
}
|
||||
|
||||
}
|
|
@ -76,13 +76,13 @@ namespace Debug
|
|||
|
||||
void DebugLock::lock()
|
||||
{
|
||||
if (interrupts_enabled())
|
||||
if (Kernel::interrupts_enabled())
|
||||
s_debug_lock.lock();
|
||||
}
|
||||
|
||||
void DebugLock::unlock()
|
||||
{
|
||||
if (interrupts_enabled())
|
||||
if (Kernel::interrupts_enabled())
|
||||
s_debug_lock.unlock();
|
||||
}
|
||||
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
#include <kernel/ACPI.h>
|
||||
#include <kernel/FS/DevFS/FileSystem.h>
|
||||
#include <kernel/IDT.h>
|
||||
#include <kernel/Input/PS2Config.h>
|
||||
#include <kernel/Input/PS2Controller.h>
|
||||
#include <kernel/Input/PS2Keyboard.h>
|
||||
#include <kernel/InterruptController.h>
|
||||
|
@ -11,77 +12,6 @@
|
|||
namespace Kernel::Input
|
||||
{
|
||||
|
||||
namespace PS2
|
||||
{
|
||||
|
||||
enum IOPort : uint8_t
|
||||
{
|
||||
DATA = 0x60,
|
||||
STATUS = 0x64,
|
||||
COMMAND = 0x64,
|
||||
};
|
||||
|
||||
enum Status : uint8_t
|
||||
{
|
||||
OUTPUT_FULL = (1 << 0),
|
||||
INPUT_FULL = (1 << 1),
|
||||
SYSTEM = (1 << 2),
|
||||
DEVICE_OR_CONTROLLER = (1 << 3),
|
||||
TIMEOUT_ERROR = (1 << 6),
|
||||
PARITY_ERROR = (1 << 7),
|
||||
};
|
||||
|
||||
enum Config : uint8_t
|
||||
{
|
||||
INTERRUPT_FIRST_PORT = (1 << 0),
|
||||
INTERRUPT_SECOND_PORT = (1 << 1),
|
||||
SYSTEM_FLAG = (1 << 2),
|
||||
ZERO1 = (1 << 3),
|
||||
CLOCK_FIRST_PORT = (1 << 4),
|
||||
CLOCK_SECOND_PORT = (1 << 5),
|
||||
TRANSLATION_FIRST_PORT = (1 << 6),
|
||||
ZERO2 = (1 << 7),
|
||||
};
|
||||
|
||||
enum Command : uint8_t
|
||||
{
|
||||
READ_CONFIG = 0x20,
|
||||
WRITE_CONFIG = 0x60,
|
||||
DISABLE_SECOND_PORT = 0xA7,
|
||||
ENABLE_SECOND_PORT = 0xA8,
|
||||
TEST_SECOND_PORT = 0xA9,
|
||||
TEST_CONTROLLER = 0xAA,
|
||||
TEST_FIRST_PORT = 0xAB,
|
||||
DISABLE_FIRST_PORT = 0xAD,
|
||||
ENABLE_FIRST_PORT = 0xAE,
|
||||
WRITE_TO_SECOND_PORT = 0xD4,
|
||||
};
|
||||
|
||||
enum Response
|
||||
{
|
||||
TEST_FIRST_PORT_PASS = 0x00,
|
||||
TEST_SECOND_PORT_PASS = 0x00,
|
||||
TEST_CONTROLLER_PASS = 0x55,
|
||||
SELF_TEST_PASS = 0xAA,
|
||||
ACK = 0xFA,
|
||||
};
|
||||
|
||||
enum DeviceCommand
|
||||
{
|
||||
ENABLE_SCANNING = 0xF4,
|
||||
DISABLE_SCANNING = 0xF5,
|
||||
IDENTIFY = 0xF2,
|
||||
RESET = 0xFF,
|
||||
};
|
||||
|
||||
enum IRQ
|
||||
{
|
||||
DEVICE0 = 1,
|
||||
DEVICE1 = 12,
|
||||
};
|
||||
|
||||
}
|
||||
|
||||
static constexpr uint64_t s_device_timeout_ms = 100;
|
||||
|
||||
static void controller_send_command(PS2::Command command)
|
||||
|
@ -136,20 +66,6 @@ namespace Kernel::Input
|
|||
return {};
|
||||
}
|
||||
|
||||
void PS2Controller::device0_irq()
|
||||
{
|
||||
auto& controller = PS2Controller::get();
|
||||
ASSERT(controller.m_devices[0] != nullptr);
|
||||
controller.m_devices[0]->on_byte(IO::inb(PS2::IOPort::DATA));
|
||||
}
|
||||
|
||||
void PS2Controller::device1_irq()
|
||||
{
|
||||
auto& controller = PS2Controller::get();
|
||||
ASSERT(controller.m_devices[1] != nullptr);
|
||||
controller.m_devices[1]->on_byte(IO::inb(PS2::IOPort::DATA));
|
||||
}
|
||||
|
||||
static PS2Controller* s_instance = nullptr;
|
||||
|
||||
BAN::ErrorOr<void> PS2Controller::initialize()
|
||||
|
@ -256,15 +172,15 @@ namespace Kernel::Input
|
|||
|
||||
if (m_devices[0])
|
||||
{
|
||||
IDT::register_irq_handler(PS2::IRQ::DEVICE0, device0_irq);
|
||||
InterruptController::get().enable_irq(PS2::IRQ::DEVICE0);
|
||||
m_devices[0]->set_irq(PS2::IRQ::DEVICE0);
|
||||
m_devices[0]->enable_interrupt();
|
||||
config |= PS2::Config::INTERRUPT_FIRST_PORT;
|
||||
DevFileSystem::get().add_device("input0", m_devices[0]);
|
||||
}
|
||||
if (m_devices[1])
|
||||
{
|
||||
IDT::register_irq_handler(PS2::IRQ::DEVICE1, device1_irq);
|
||||
InterruptController::get().enable_irq(PS2::IRQ::DEVICE1);
|
||||
m_devices[1]->set_irq(PS2::IRQ::DEVICE1);
|
||||
m_devices[1]->enable_interrupt();
|
||||
config |= PS2::Config::INTERRUPT_SECOND_PORT;
|
||||
DevFileSystem::get().add_device("input1", m_devices[1]);
|
||||
}
|
||||
|
|
|
@ -1,7 +1,9 @@
|
|||
#include <BAN/ScopeGuard.h>
|
||||
#include <kernel/CriticalScope.h>
|
||||
#include <kernel/FS/DevFS/FileSystem.h>
|
||||
#include <kernel/Input/PS2Config.h>
|
||||
#include <kernel/Input/PS2Keyboard.h>
|
||||
#include <kernel/IO.h>
|
||||
#include <kernel/Timer/Timer.h>
|
||||
|
||||
#include <sys/sysmacros.h>
|
||||
|
@ -12,35 +14,6 @@
|
|||
namespace Kernel::Input
|
||||
{
|
||||
|
||||
namespace PS2
|
||||
{
|
||||
|
||||
enum Response
|
||||
{
|
||||
KEY_ERROR_OR_BUFFER_OVERRUN1 = 0x00,
|
||||
SELF_TEST_PASSED = 0xAA,
|
||||
ECHO_RESPONSE = 0xEE,
|
||||
ACK = 0xFA,
|
||||
RESEND = 0xFE,
|
||||
KEY_ERROR_OR_BUFFER_OVERRUN2 = 0xFF,
|
||||
};
|
||||
|
||||
enum Scancode
|
||||
{
|
||||
SET_SCANCODE_SET1 = 1,
|
||||
SET_SCANCODE_SET2 = 2,
|
||||
SET_SCANCODE_SET3 = 3,
|
||||
};
|
||||
|
||||
enum Leds
|
||||
{
|
||||
SCROLL_LOCK = (1 << 0),
|
||||
NUM_LOCK = (1 << 1),
|
||||
CAPS_LOCK = (1 << 2),
|
||||
};
|
||||
|
||||
}
|
||||
|
||||
BAN::ErrorOr<PS2Keyboard*> PS2Keyboard::create(PS2Controller& controller)
|
||||
{
|
||||
PS2Keyboard* keyboard = new PS2Keyboard(controller);
|
||||
|
@ -57,8 +30,10 @@ namespace Kernel::Input
|
|||
, m_rdev(makedev(DevFileSystem::get().get_next_dev(), 0))
|
||||
{ }
|
||||
|
||||
void PS2Keyboard::on_byte(uint8_t byte)
|
||||
void PS2Keyboard::handle_irq()
|
||||
{
|
||||
uint8_t byte = IO::inb(PS2::IOPort::DATA);
|
||||
|
||||
// NOTE: This implementation does not allow using commands
|
||||
// that respond with more bytes than ACK
|
||||
switch (m_state)
|
||||
|
@ -71,11 +46,11 @@ namespace Kernel::Input
|
|||
m_command_queue.pop();
|
||||
m_state = State::Normal;
|
||||
break;
|
||||
case PS2::Response::RESEND:
|
||||
case PS2::KBResponse::RESEND:
|
||||
m_state = State::Normal;
|
||||
break;
|
||||
case PS2::Response::KEY_ERROR_OR_BUFFER_OVERRUN1:
|
||||
case PS2::Response::KEY_ERROR_OR_BUFFER_OVERRUN2:
|
||||
case PS2::KBResponse::KEY_ERROR_OR_BUFFER_OVERRUN1:
|
||||
case PS2::KBResponse::KEY_ERROR_OR_BUFFER_OVERRUN2:
|
||||
dwarnln("Key detection error or internal buffer overrun");
|
||||
break;
|
||||
default:
|
||||
|
@ -97,7 +72,7 @@ namespace Kernel::Input
|
|||
BAN::ErrorOr<void> PS2Keyboard::initialize()
|
||||
{
|
||||
append_command_queue(Command::SET_LEDS, 0x00);
|
||||
append_command_queue(Command::SCANCODE, PS2::Scancode::SET_SCANCODE_SET2);
|
||||
append_command_queue(Command::SCANCODE, PS2::KBScancode::SET_SCANCODE_SET2);
|
||||
append_command_queue(Command::ENABLE_SCANNING);
|
||||
return {};
|
||||
}
|
||||
|
@ -234,11 +209,11 @@ namespace Kernel::Input
|
|||
{
|
||||
uint8_t new_leds = 0;
|
||||
if (m_modifiers & (uint8_t)Input::KeyEvent::Modifier::ScrollLock)
|
||||
new_leds |= PS2::Leds::SCROLL_LOCK;
|
||||
new_leds |= PS2::KBLeds::SCROLL_LOCK;
|
||||
if (m_modifiers & (uint8_t)Input::KeyEvent::Modifier::NumLock)
|
||||
new_leds |= PS2::Leds::NUM_LOCK;
|
||||
new_leds |= PS2::KBLeds::NUM_LOCK;
|
||||
if (m_modifiers & (uint8_t)Input::KeyEvent::Modifier::CapsLock)
|
||||
new_leds |= PS2::Leds::CAPS_LOCK;
|
||||
new_leds |= PS2::KBLeds::CAPS_LOCK;
|
||||
append_command_queue(Command::SET_LEDS, new_leds);
|
||||
}
|
||||
|
||||
|
|
|
@ -5,16 +5,40 @@
|
|||
|
||||
#include <lai/helpers/sci.h>
|
||||
|
||||
static InterruptController* s_instance = nullptr;
|
||||
|
||||
InterruptController& InterruptController::get()
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
namespace IDT { void register_irq_handler(uint8_t irq, Interruptable*); }
|
||||
|
||||
static InterruptController* s_instance = nullptr;
|
||||
|
||||
void Interruptable::set_irq(int irq)
|
||||
{
|
||||
if (m_irq != -1)
|
||||
IDT::register_irq_handler(m_irq, nullptr);
|
||||
m_irq = irq;
|
||||
IDT::register_irq_handler(irq, this);
|
||||
}
|
||||
|
||||
void Interruptable::enable_interrupt()
|
||||
{
|
||||
ASSERT(m_irq != -1);
|
||||
InterruptController::get().enable_irq(m_irq);
|
||||
}
|
||||
|
||||
void Interruptable::disable_interrupt()
|
||||
{
|
||||
ASSERT_NOT_REACHED();
|
||||
}
|
||||
|
||||
InterruptController& InterruptController::get()
|
||||
{
|
||||
ASSERT(s_instance);
|
||||
return *s_instance;
|
||||
}
|
||||
}
|
||||
|
||||
void InterruptController::initialize(bool force_pic)
|
||||
{
|
||||
void InterruptController::initialize(bool force_pic)
|
||||
{
|
||||
ASSERT(s_instance == nullptr);
|
||||
|
||||
PIC::mask_all();
|
||||
|
@ -35,17 +59,19 @@ void InterruptController::initialize(bool force_pic)
|
|||
ASSERT(s_instance);
|
||||
|
||||
s_instance->m_using_apic = false;
|
||||
}
|
||||
}
|
||||
|
||||
void InterruptController::enter_acpi_mode()
|
||||
{
|
||||
void InterruptController::enter_acpi_mode()
|
||||
{
|
||||
if (lai_enable_acpi(m_using_apic ? 1 : 0) != 0)
|
||||
dwarnln("could not enter acpi mode");
|
||||
}
|
||||
}
|
||||
|
||||
bool interrupts_enabled()
|
||||
{
|
||||
bool interrupts_enabled()
|
||||
{
|
||||
uintptr_t flags;
|
||||
asm volatile("pushf; pop %0" : "=r"(flags) :: "memory");
|
||||
return flags & (1 << 9);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -66,7 +66,7 @@ namespace Kernel
|
|||
ASSERT(page->next == nullptr);
|
||||
|
||||
// Detatch page from top of the free list
|
||||
m_free_list = m_free_list->prev ? m_free_list->prev : nullptr;
|
||||
m_free_list = m_free_list->prev;
|
||||
if (m_free_list)
|
||||
m_free_list->next = nullptr;
|
||||
|
||||
|
|
|
@ -17,15 +17,18 @@
|
|||
|
||||
#define ICW4_8086 0x01
|
||||
|
||||
PIC* PIC::create()
|
||||
namespace Kernel
|
||||
{
|
||||
|
||||
PIC* PIC::create()
|
||||
{
|
||||
mask_all();
|
||||
remap();
|
||||
return new PIC;
|
||||
}
|
||||
}
|
||||
|
||||
void PIC::remap()
|
||||
{
|
||||
void PIC::remap()
|
||||
{
|
||||
uint8_t a1 = IO::inb(PIC1_DATA);
|
||||
uint8_t a2 = IO::inb(PIC2_DATA);
|
||||
|
||||
|
@ -56,24 +59,24 @@ void PIC::remap()
|
|||
// Restore original masks
|
||||
IO::outb(PIC1_DATA, a1);
|
||||
IO::outb(PIC2_DATA, a2);
|
||||
}
|
||||
}
|
||||
|
||||
void PIC::mask_all()
|
||||
{
|
||||
void PIC::mask_all()
|
||||
{
|
||||
// NOTE: don't mask irq 2 as it is needed for slave pic
|
||||
IO::outb(PIC1_DATA, 0xFB);
|
||||
IO::outb(PIC2_DATA, 0xFF);
|
||||
}
|
||||
}
|
||||
|
||||
void PIC::eoi(uint8_t irq)
|
||||
{
|
||||
void PIC::eoi(uint8_t irq)
|
||||
{
|
||||
if (irq >= 8)
|
||||
IO::outb(PIC2_CMD, PIC_EOI);
|
||||
IO::outb(PIC1_CMD, PIC_EOI);
|
||||
}
|
||||
}
|
||||
|
||||
void PIC::enable_irq(uint8_t irq)
|
||||
{
|
||||
void PIC::enable_irq(uint8_t irq)
|
||||
{
|
||||
uint16_t port = PIC1_DATA;
|
||||
if(irq >= 8)
|
||||
{
|
||||
|
@ -81,10 +84,10 @@ void PIC::enable_irq(uint8_t irq)
|
|||
irq -= 8;
|
||||
}
|
||||
IO::outb(port, IO::inb(port) & ~(1 << irq));
|
||||
}
|
||||
}
|
||||
|
||||
bool PIC::is_in_service(uint8_t irq)
|
||||
{
|
||||
bool PIC::is_in_service(uint8_t irq)
|
||||
{
|
||||
uint16_t port = PIC1_CMD;
|
||||
if (irq >= 8)
|
||||
{
|
||||
|
@ -93,4 +96,6 @@ bool PIC::is_in_service(uint8_t irq)
|
|||
}
|
||||
IO::outb(port, PIC_ISR);
|
||||
return IO::inb(port) & (1 << irq);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -11,40 +11,6 @@
|
|||
namespace Kernel
|
||||
{
|
||||
|
||||
static void bus_irq_handler0();
|
||||
static void bus_irq_handler1();
|
||||
|
||||
struct BusIRQ
|
||||
{
|
||||
ATABus* bus { nullptr };
|
||||
void (*handler)() { nullptr };
|
||||
uint8_t irq { 0 };
|
||||
};
|
||||
static BusIRQ s_bus_irqs[] {
|
||||
{ nullptr, bus_irq_handler0, 0 },
|
||||
{ nullptr, bus_irq_handler1, 0 },
|
||||
};
|
||||
|
||||
static void bus_irq_handler0() { ASSERT(s_bus_irqs[0].bus); s_bus_irqs[0].bus->on_irq(); }
|
||||
static void bus_irq_handler1() { ASSERT(s_bus_irqs[1].bus); s_bus_irqs[1].bus->on_irq(); }
|
||||
|
||||
static void register_bus_irq_handler(ATABus* bus, uint8_t irq)
|
||||
{
|
||||
for (uint8_t i = 0; i < sizeof(s_bus_irqs) / sizeof(BusIRQ); i++)
|
||||
{
|
||||
if (s_bus_irqs[i].bus == nullptr)
|
||||
{
|
||||
s_bus_irqs[i].bus = bus;
|
||||
s_bus_irqs[i].irq = irq;
|
||||
|
||||
IDT::register_irq_handler(irq, s_bus_irqs[i].handler);
|
||||
InterruptController::get().enable_irq(irq);
|
||||
return;
|
||||
}
|
||||
}
|
||||
ASSERT_NOT_REACHED();
|
||||
}
|
||||
|
||||
ATABus* ATABus::create(ATAController& controller, uint16_t base, uint16_t ctrl, uint8_t irq)
|
||||
{
|
||||
ATABus* bus = new ATABus(controller, base, ctrl);
|
||||
|
@ -55,11 +21,11 @@ namespace Kernel
|
|||
|
||||
void ATABus::initialize(uint8_t irq)
|
||||
{
|
||||
register_bus_irq_handler(this, irq);
|
||||
set_irq(irq);
|
||||
enable_interrupt();
|
||||
|
||||
uint16_t* identify_buffer = new uint16_t[256];
|
||||
ASSERT(identify_buffer);
|
||||
BAN::ScopeGuard _([identify_buffer] { delete[] identify_buffer; });
|
||||
BAN::Vector<uint16_t> identify_buffer;
|
||||
MUST(identify_buffer.resize(256));
|
||||
|
||||
for (uint8_t i = 0; i < 2; i++)
|
||||
{
|
||||
|
@ -72,11 +38,11 @@ namespace Kernel
|
|||
|
||||
BAN::ScopeGuard guard([this, i] { m_devices[i] = nullptr; });
|
||||
|
||||
auto type = identify(device, identify_buffer);
|
||||
auto type = identify(device, identify_buffer.data());
|
||||
if (type == DeviceType::None)
|
||||
continue;
|
||||
|
||||
auto res = device.initialize(type, identify_buffer);
|
||||
auto res = device.initialize(type, identify_buffer.data());
|
||||
if (res.is_error())
|
||||
{
|
||||
dprintln("{}", res.error());
|
||||
|
@ -149,7 +115,7 @@ namespace Kernel
|
|||
return type;
|
||||
}
|
||||
|
||||
void ATABus::on_irq()
|
||||
void ATABus::handle_irq()
|
||||
{
|
||||
ASSERT(!m_has_got_irq);
|
||||
if (io_read(ATA_PORT_STATUS) & ATA_STATUS_ERR)
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
#include <BAN/Array.h>
|
||||
#include <BAN/CircularQueue.h>
|
||||
#include <kernel/CriticalScope.h>
|
||||
#include <kernel/FS/DevFS/FileSystem.h>
|
||||
#include <kernel/IDT.h>
|
||||
|
@ -38,37 +37,9 @@ namespace Kernel
|
|||
static BAN::Array<Serial, sizeof(s_serial_ports) / sizeof(*s_serial_ports)> s_serial_drivers;
|
||||
static bool s_has_devices { false };
|
||||
|
||||
static BAN::CircularQueue<uint8_t, 128> s_com1_input;
|
||||
static BAN::CircularQueue<uint8_t, 128> s_com2_input;
|
||||
static BAN::RefPtr<SerialTTY> s_com1;
|
||||
static BAN::RefPtr<SerialTTY> s_com2;
|
||||
|
||||
static void irq3_handler()
|
||||
{
|
||||
if (!s_serial_drivers[1].is_valid())
|
||||
return;
|
||||
uint8_t ch = IO::inb(COM2_PORT);
|
||||
if (s_com2_input.full())
|
||||
{
|
||||
dwarnln("COM2 buffer full");
|
||||
s_com2_input.pop();
|
||||
}
|
||||
s_com2_input.push(ch);
|
||||
}
|
||||
|
||||
static void irq4_handler()
|
||||
{
|
||||
if (!s_serial_drivers[0].is_valid())
|
||||
return;
|
||||
uint8_t ch = IO::inb(COM1_PORT);
|
||||
if (s_com1_input.full())
|
||||
{
|
||||
dwarnln("COM1 buffer full");
|
||||
s_com1_input.pop();
|
||||
}
|
||||
s_com1_input.push(ch);
|
||||
}
|
||||
|
||||
static dev_t next_rdev()
|
||||
{
|
||||
static dev_t major = DevFileSystem::get().get_next_dev();
|
||||
|
@ -220,14 +191,14 @@ namespace Kernel
|
|||
if (serial.port() == COM1_PORT)
|
||||
{
|
||||
IO::outb(COM1_PORT + 1, 1);
|
||||
InterruptController::get().enable_irq(COM1_IRQ);
|
||||
IDT::register_irq_handler(COM1_IRQ, irq4_handler);
|
||||
tty->set_irq(COM1_IRQ);
|
||||
tty->enable_interrupt();
|
||||
}
|
||||
else if (serial.port() == COM2_PORT)
|
||||
{
|
||||
IO::outb(COM2_PORT + 1, 1);
|
||||
InterruptController::get().enable_irq(COM2_IRQ);
|
||||
IDT::register_irq_handler(COM2_IRQ, irq3_handler);
|
||||
tty->set_irq(COM2_IRQ);
|
||||
tty->enable_interrupt();
|
||||
}
|
||||
|
||||
auto ref_ptr = BAN::RefPtr<SerialTTY>::adopt(tty);
|
||||
|
@ -239,41 +210,45 @@ namespace Kernel
|
|||
return ref_ptr;
|
||||
}
|
||||
|
||||
void SerialTTY::handle_irq()
|
||||
{
|
||||
uint8_t ch = IO::inb(m_serial.port());
|
||||
if (m_input.full())
|
||||
{
|
||||
dwarnln("Serial buffer full");
|
||||
m_input.pop();
|
||||
}
|
||||
m_input.push(ch);
|
||||
}
|
||||
|
||||
void SerialTTY::update()
|
||||
{
|
||||
if (m_serial.port() != COM1_PORT && m_serial.port() != COM2_PORT)
|
||||
return;
|
||||
|
||||
static uint8_t buffer[128];
|
||||
uint8_t buffer[128];
|
||||
|
||||
auto update_com =
|
||||
[&](auto& device, auto& input_queue)
|
||||
{
|
||||
if (input_queue.empty())
|
||||
CriticalScope _;
|
||||
if (m_input.empty())
|
||||
return;
|
||||
uint8_t* ptr = buffer;
|
||||
while (!input_queue.empty())
|
||||
while (!m_input.empty())
|
||||
{
|
||||
*ptr = input_queue.front();
|
||||
*ptr = m_input.front();
|
||||
if (*ptr == '\r')
|
||||
*ptr = '\n';
|
||||
if (*ptr == 127)
|
||||
*ptr++ = '\b', *ptr++ = ' ', *ptr = '\b';
|
||||
input_queue.pop();
|
||||
m_input.pop();
|
||||
ptr++;
|
||||
}
|
||||
*ptr = '\0';
|
||||
}
|
||||
|
||||
ptr = buffer;
|
||||
const uint8_t* ptr = buffer;
|
||||
while (*ptr)
|
||||
device->handle_input_byte(*ptr++);
|
||||
};
|
||||
|
||||
CriticalScope _;
|
||||
if (m_serial.port() == COM1_PORT)
|
||||
update_com(s_com1, s_com1_input);
|
||||
if (m_serial.port() == COM2_PORT)
|
||||
update_com(s_com2, s_com2_input);
|
||||
handle_input_byte(*ptr++);
|
||||
}
|
||||
|
||||
uint32_t SerialTTY::width() const
|
||||
|
|
|
@ -131,12 +131,17 @@ namespace Kernel
|
|||
for (int i = 1; i <= header->comparator_count; i++)
|
||||
write_register(HPET_REG_TIMER_CONFIG(i), 0);
|
||||
|
||||
IDT::register_irq_handler(irq, [] { Scheduler::get().timer_reschedule(); });
|
||||
InterruptController::get().enable_irq(irq);
|
||||
set_irq(irq);
|
||||
enable_interrupt();
|
||||
|
||||
return {};
|
||||
}
|
||||
|
||||
void HPET::handle_irq()
|
||||
{
|
||||
Scheduler::get().timer_reschedule();
|
||||
}
|
||||
|
||||
uint64_t HPET::ms_since_boot() const
|
||||
{
|
||||
// FIXME: 32 bit CPUs should use 32 bit counter with 32 bit reads
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
#include <kernel/Scheduler.h>
|
||||
#include <kernel/Timer/PIT.h>
|
||||
|
||||
#define PIT_IRQ 0
|
||||
|
||||
#define TIMER0_CTL 0x40
|
||||
#define TIMER1_CTL 0x41
|
||||
#define TIMER2_CTL 0x42
|
||||
|
@ -27,14 +29,6 @@
|
|||
namespace Kernel
|
||||
{
|
||||
|
||||
static volatile uint64_t s_system_time = 0;
|
||||
|
||||
void irq_handler()
|
||||
{
|
||||
s_system_time = s_system_time + 1;
|
||||
Kernel::Scheduler::get().timer_reschedule();
|
||||
}
|
||||
|
||||
BAN::ErrorOr<BAN::UniqPtr<PIT>> PIT::create()
|
||||
{
|
||||
PIT* pit = new PIT();
|
||||
|
@ -53,19 +47,24 @@ namespace Kernel
|
|||
IO::outb(TIMER0_CTL, (timer_reload >> 0) & 0xff);
|
||||
IO::outb(TIMER0_CTL, (timer_reload >> 8) & 0xff);
|
||||
|
||||
IDT::register_irq_handler(PIT_IRQ, irq_handler);
|
||||
set_irq(PIT_IRQ);
|
||||
enable_interrupt();
|
||||
}
|
||||
|
||||
InterruptController::get().enable_irq(PIT_IRQ);
|
||||
void PIT::handle_irq()
|
||||
{
|
||||
m_system_time = m_system_time + 1;
|
||||
Kernel::Scheduler::get().timer_reschedule();
|
||||
}
|
||||
|
||||
uint64_t PIT::ms_since_boot() const
|
||||
{
|
||||
return s_system_time * (MS_PER_S / TICKS_PER_SECOND);
|
||||
return m_system_time * (MS_PER_S / TICKS_PER_SECOND);
|
||||
}
|
||||
|
||||
timespec PIT::time_since_boot() const
|
||||
{
|
||||
uint64_t ticks = s_system_time;
|
||||
uint64_t ticks = m_system_time;
|
||||
return timespec {
|
||||
.tv_sec = ticks / TICKS_PER_SECOND,
|
||||
.tv_nsec = (long)((ticks % TICKS_PER_SECOND) * (NS_PER_S / TICKS_PER_SECOND))
|
||||
|
|
Loading…
Reference in New Issue