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Kernel: Fix PCI BarRegion offsets 

Calculations accidentally assumed bar registers are 8 byte instead
of 4.
This commit is contained in:
Bananymous 2023-10-07 19:16:10 +03:00
parent 27364f64a6
commit f071240b33
1 changed files with 3 additions and 3 deletions
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6
kernel/kernel/PCI.cpp
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@ -184,12 +184,12 @@ namespace Kernel::PCI
// disable io/mem space while reading bar // disable io/mem space while reading bar
device.write_dword(0x04, command_status & ~3); device.write_dword(0x04, command_status & ~3);
uint8_t offset = 0x10 + bar_num * 8; uint8_t offset = 0x10 + bar_num * 4;
uint64_t addr = device.read_dword(offset); uint64_t addr = device.read_dword(offset);
device.write_dword(offset, 0xFFFFFFFF); device.write_dword(offset, 0xFFFFFFFF);
uint32_t size = device.read_dword(0x10 + bar_num * 8); uint32_t size = device.read_dword(offset);
size = ~size + 1; size = ~size + 1;
device.write_dword(offset, addr); device.write_dword(offset, addr);
@ -209,7 +209,7 @@ namespace Kernel::PCI
{ {
type = BarType::MEM; type = BarType::MEM;
addr &= 0xFFFFFFF0; addr &= 0xFFFFFFF0;
addr |= (uint64_t)device.read_dword(offset + 8) << 32; addr |= (uint64_t)device.read_dword(offset + 4) << 32;
} }
if (type == BarType::INVALID) if (type == BarType::INVALID)