Kernel: Finally managed to get 64-bit working
I had weird problems with interrupts but everything should work now
This commit is contained in:
Bananymous
parent
c4670f49d4
commit
b315fdc27f
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@ -0,0 +1,8 @@
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ARCH_CFLAGS=
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ARCH_CPPFLAGS=
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KERNEL_ARCH_CFLAGS=
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KERNEL_ARCH_CPPFLAGS=
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ARCH_FREEOBJS=\
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ARCH_HOSTEDOBJS=\
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@ -0,0 +1,236 @@
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#include <BAN/Errors.h>
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#include <kernel/IDT.h>
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#include <kernel/InterruptController.h>
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#include <kernel/kmalloc.h>
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#include <kernel/Panic.h>
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#define REGISTER_ISR_HANDLER(i) register_interrupt_handler(i, isr ## i)
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#define REGISTER_IRQ_HANDLER(i) register_interrupt_handler(IRQ_VECTOR_BASE + i, irq ## i)
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namespace IDT
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{
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struct GateDescriptor
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{
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uint16_t offset1;
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uint16_t selector;
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uint8_t IST;
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uint8_t flags;
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uint16_t offset2;
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uint32_t offset3;
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uint32_t reserved;
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} __attribute__((packed));
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struct IDTR
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{
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uint16_t size;
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uint64_t offset;
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} __attribute__((packed));
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static IDTR s_idtr;
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static GateDescriptor* s_idt = nullptr;
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static void (*s_irq_handlers[0x10])() { nullptr };
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static const char* isr_exceptions[] =
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{
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"Division Error",
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"Debug",
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"Non-maskable Interrupt",
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"Breakpoint",
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"Overflow",
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"Bound Range Exception",
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"Invalid Opcode",
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"Device Not Available",
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"Double Fault",
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"Coprocessor Segment Overrun",
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"Invalid TSS",
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"Segment Not Present",
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"Stack-Segment Fault",
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"General Protection Fault",
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"Page Fault",
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"Unknown Exception 0x0F",
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"x87 Floating-Point Exception",
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"Alignment Check",
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"Machine Check",
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"SIMD Floating-Point Exception",
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"Virtualization Exception",
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"Control Protection Exception",
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"Unknown Exception 0x16",
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"Unknown Exception 0x17",
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"Unknown Exception 0x18",
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"Unknown Exception 0x19",
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"Unknown Exception 0x1A",
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"Unknown Exception 0x1B",
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"Hypervisor Injection Exception",
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"VMM Communication Exception",
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"Security Exception",
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"Unkown Exception 0x1F",
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};
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extern "C" void cpp_isr_handler(uint64_t isr, uint64_t error)
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{
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uint64_t rax, rbx, rcx, rdx, rsp, rbp;
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uint64_t cr0, cr2, cr3, cr4;
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asm volatile("":"=a"(rax),"=b"(rbx),"=c"(rcx),"=d"(rdx));
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asm volatile("movq %%rsp, %%rax":"=a"(rsp));
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asm volatile("movq %%rbp, %%rax":"=a"(rbp));
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asm volatile("movq %%cr0, %%rax":"=a"(cr0));
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asm volatile("movq %%cr2, %%rax":"=a"(cr2));
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asm volatile("movq %%cr3, %%rax":"=a"(cr3));
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asm volatile("movq %%cr4, %%rax":"=a"(cr4));
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Kernel::Panic(
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"{} (error code: 0x{16H})\r\n"
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"Register dump\r\n"
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"rax=0x{16H}, rbx=0x{16H}, rcx=0x{16H}, rdx=0x{16H}\r\n"
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"rsp=0x{16H}, rbp=0x{16H}\r\n"
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"CR0=0x{16H}, CR2=0x{16H}, CR3=0x{16H}, CR4=0x{16H}\r\n",
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isr_exceptions[isr], error, rax, rbx, rcx, rdx, rsp, rbp, cr0, cr2, cr3, cr4
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);
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}
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extern "C" void cpp_irq_handler(uint64_t irq)
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{
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if (s_irq_handlers[irq])
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s_irq_handlers[irq]();
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else
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dprintln("no handler for irq 0x{2H}\n", irq);
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InterruptController::Get().EOI(irq);
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}
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static void flush_idt()
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{
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asm volatile("lidt %0"::"m"(s_idtr));
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}
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static void register_interrupt_handler(uint8_t index, void (*f)())
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{
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GateDescriptor& descriptor = s_idt[index];
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descriptor.offset1 = (uint16_t)((uint64_t)f >> 0);
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descriptor.offset2 = (uint16_t)((uint64_t)f >> 16);
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descriptor.offset3 = (uint32_t)((uint64_t)f >> 32);
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descriptor.selector = 0x08;
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descriptor.IST = 0;
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descriptor.flags = 0x8E;
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}
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void register_irq_handler(uint8_t irq, void (*f)())
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{
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s_irq_handlers[irq] = f;
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}
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extern "C" void isr0();
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extern "C" void isr1();
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extern "C" void isr2();
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extern "C" void isr3();
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extern "C" void isr4();
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extern "C" void isr5();
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extern "C" void isr6();
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extern "C" void isr7();
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extern "C" void isr8();
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extern "C" void isr9();
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extern "C" void isr10();
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extern "C" void isr11();
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extern "C" void isr12();
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extern "C" void isr13();
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extern "C" void isr14();
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extern "C" void isr15();
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extern "C" void isr16();
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extern "C" void isr17();
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extern "C" void isr18();
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extern "C" void isr19();
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extern "C" void isr20();
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extern "C" void isr21();
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extern "C" void isr22();
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extern "C" void isr23();
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extern "C" void isr24();
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extern "C" void isr25();
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extern "C" void isr26();
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extern "C" void isr27();
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extern "C" void isr28();
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extern "C" void isr29();
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extern "C" void isr30();
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extern "C" void isr31();
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extern "C" void irq0();
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extern "C" void irq1();
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extern "C" void irq2();
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extern "C" void irq3();
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extern "C" void irq4();
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extern "C" void irq5();
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extern "C" void irq6();
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extern "C" void irq7();
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extern "C" void irq8();
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extern "C" void irq9();
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extern "C" void irq10();
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extern "C" void irq11();
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extern "C" void irq12();
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extern "C" void irq13();
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extern "C" void irq14();
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extern "C" void irq15();
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void initialize()
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{
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s_idt = (GateDescriptor*)kmalloc_eternal(0x100 * sizeof(GateDescriptor));
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memset(s_idt, 0x00, 0x100 * sizeof(GateDescriptor));
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s_idtr.offset = (uint64_t)s_idt;
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s_idtr.size = 0x100 * sizeof(GateDescriptor) - 1;
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REGISTER_ISR_HANDLER(0);
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REGISTER_ISR_HANDLER(1);
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REGISTER_ISR_HANDLER(2);
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REGISTER_ISR_HANDLER(3);
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REGISTER_ISR_HANDLER(4);
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REGISTER_ISR_HANDLER(5);
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REGISTER_ISR_HANDLER(6);
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REGISTER_ISR_HANDLER(7);
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REGISTER_ISR_HANDLER(8);
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REGISTER_ISR_HANDLER(9);
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REGISTER_ISR_HANDLER(10);
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REGISTER_ISR_HANDLER(11);
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REGISTER_ISR_HANDLER(12);
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REGISTER_ISR_HANDLER(13);
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REGISTER_ISR_HANDLER(14);
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REGISTER_ISR_HANDLER(15);
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REGISTER_ISR_HANDLER(16);
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REGISTER_ISR_HANDLER(17);
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REGISTER_ISR_HANDLER(18);
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REGISTER_ISR_HANDLER(19);
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REGISTER_ISR_HANDLER(20);
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REGISTER_ISR_HANDLER(21);
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REGISTER_ISR_HANDLER(22);
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REGISTER_ISR_HANDLER(23);
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REGISTER_ISR_HANDLER(24);
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REGISTER_ISR_HANDLER(25);
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REGISTER_ISR_HANDLER(26);
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REGISTER_ISR_HANDLER(27);
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REGISTER_ISR_HANDLER(28);
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REGISTER_ISR_HANDLER(29);
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REGISTER_ISR_HANDLER(30);
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REGISTER_ISR_HANDLER(31);
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REGISTER_IRQ_HANDLER(0);
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REGISTER_IRQ_HANDLER(1);
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REGISTER_IRQ_HANDLER(2);
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REGISTER_IRQ_HANDLER(3);
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REGISTER_IRQ_HANDLER(4);
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REGISTER_IRQ_HANDLER(5);
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REGISTER_IRQ_HANDLER(6);
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REGISTER_IRQ_HANDLER(7);
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REGISTER_IRQ_HANDLER(8);
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REGISTER_IRQ_HANDLER(9);
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REGISTER_IRQ_HANDLER(10);
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REGISTER_IRQ_HANDLER(11);
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REGISTER_IRQ_HANDLER(12);
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REGISTER_IRQ_HANDLER(13);
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REGISTER_IRQ_HANDLER(14);
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REGISTER_IRQ_HANDLER(15);
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flush_idt();
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}
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}
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@ -0,0 +1,155 @@
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#include <BAN/Errors.h>
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#include <kernel/kmalloc.h>
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#include <kernel/MMU.h>
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#define PRESENT (1 << 0)
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#define READ_WRITE (1 << 1)
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#define PAGE_SIZE 0x1000
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#define PAGE_MASK ~(PAGE_SIZE - 1)
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#define CLEANUP_STRUCTURE(s) \
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for (uint64_t i = 0; i < 512; i++) \
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if (s[i] & PRESENT) \
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goto cleanup_done; \
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kfree(s)
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static MMU* s_instance = nullptr;
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void MMU::Intialize()
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{
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ASSERT(s_instance == nullptr);
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s_instance = new MMU();
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}
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MMU& MMU::Get()
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{
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ASSERT(s_instance);
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return *s_instance;
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}
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static uint64_t* allocate_page_aligned_page()
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{
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void* page = kmalloc(PAGE_SIZE, PAGE_SIZE);
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ASSERT(page);
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memset(page, 0, PAGE_SIZE);
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return (uint64_t*)page;
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}
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MMU::MMU()
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{
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// Identity map from 4 KiB -> 4 MiB
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m_highest_paging_struct = allocate_page_aligned_page();
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uint64_t* pdpt = allocate_page_aligned_page();
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m_highest_paging_struct[0] = (uint64_t)pdpt | READ_WRITE | PRESENT;
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uint64_t* pd = allocate_page_aligned_page();
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pdpt[0] = (uint64_t)pd | READ_WRITE | PRESENT;
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for (uint32_t i = 0; i < 2; i++)
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{
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uint64_t* pt = allocate_page_aligned_page();
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for (uint64_t j = 0; j < 512; j++)
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pt[j] = (i << 21) | (j << 12) | READ_WRITE | PRESENT;
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pd[i] = (uint64_t)pt | READ_WRITE | PRESENT;
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}
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// Unmap 0 -> 4 KiB
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uint64_t* pt1 = (uint64_t*)(pd[0] & PAGE_MASK);
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pt1[0] = 0;
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// Load the new pml4
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asm volatile("movq %0, %%cr3" :: "r"(m_highest_paging_struct));
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}
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void MMU::AllocatePage(uintptr_t address)
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{
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ASSERT((address >> 48) == 0);
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address &= PAGE_MASK;
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uint64_t pml4e = (address >> 39) & 0x1FF;
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uint64_t pdpte = (address >> 30) & 0x1FF;
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uint64_t pde = (address >> 21) & 0x1FF;
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uint64_t pte = (address >> 12) & 0x1FF;
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uint64_t* pml4 = m_highest_paging_struct;
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if (!(pml4[pml4e] & PRESENT))
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{
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uint64_t* pdpt = allocate_page_aligned_page();
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pml4[pml4e] = (uint64_t)pdpt | READ_WRITE | PRESENT;
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}
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uint64_t* pdpt = (uint64_t*)(pml4[pml4e] & PAGE_MASK);
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if (!(pdpt[pdpte] & PRESENT))
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{
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uint64_t* pd = allocate_page_aligned_page();
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pdpt[pdpte] = (uint64_t)pd | READ_WRITE | PRESENT;
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}
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uint64_t* pd = (uint64_t*)(pdpt[pdpte] & PAGE_MASK);
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if (!(pd[pde] & PRESENT))
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{
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uint64_t* pt = allocate_page_aligned_page();
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pd[pde] = (uint64_t)pt | READ_WRITE | PRESENT;
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}
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uint64_t* pt = (uint64_t*)(pd[pde] & PAGE_MASK);
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if (!(pt[pte] & PRESENT))
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pt[pte] = address | READ_WRITE | PRESENT;
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asm volatile("invlpg (%0)" :: "r"(address) : "memory");
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}
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void MMU::AllocateRange(uintptr_t address, ptrdiff_t size)
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{
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uintptr_t s_page = address & PAGE_MASK;
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uintptr_t e_page = (address + size - 1) & PAGE_MASK;
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for (uintptr_t page = s_page; page <= e_page; page += PAGE_SIZE)
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AllocatePage(page);
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}
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void MMU::UnAllocatePage(uintptr_t address)
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{
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ASSERT((address >> 48) == 0);
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address &= PAGE_MASK;
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uint64_t pml4e = (address >> 39) & 0x1FF;
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uint64_t pdpte = (address >> 30) & 0x1FF;
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uint64_t pde = (address >> 21) & 0x1FF;
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uint64_t pte = (address >> 12) & 0x1FF;
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uint64_t* pml4 = m_highest_paging_struct;
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ASSERT(pml4[pml4e] & PRESENT);
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uint64_t* pdpt = (uint64_t*)(pml4[pml4e] & PAGE_MASK);
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ASSERT(pdpt[pdpte] & PRESENT);
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uint64_t* pd = (uint64_t*)(pdpt[pdpte] & PAGE_MASK);
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ASSERT(pd[pde] & PRESENT);
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uint64_t* pt = (uint64_t*)(pd[pde] & PAGE_MASK);
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ASSERT(pt[pte] & PRESENT);
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pt[pte] = 0;
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CLEANUP_STRUCTURE(pt);
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pd[pde] = 0;
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CLEANUP_STRUCTURE(pd);
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pdpt[pdpte] = 0;
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CLEANUP_STRUCTURE(pdpt);
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pml4[pml4e] = 0;
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cleanup_done:
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asm volatile("invlpg (%0)" :: "r"(address) : "memory");
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}
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void MMU::UnAllocateRange(uintptr_t address, ptrdiff_t size)
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{
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uintptr_t s_page = address & PAGE_MASK;
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uintptr_t e_page = (address + size - 1) & PAGE_MASK;
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for (uintptr_t page = s_page; page <= e_page; page += PAGE_SIZE)
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UnAllocatePage(page);
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}
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@ -0,0 +1,199 @@
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# Declare constants for the multiboot header
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.set ALIGN, 1<<0 # align loaded modules on page boundaries
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.set MEMINFO, 1<<1 # provide memory map
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.set VIDEOINFO, 1<<2 # provide video info
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.set MB_FLAGS, ALIGN | MEMINFO | VIDEOINFO # this is the Multiboot 'flag' field
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.set MB_MAGIC, 0x1BADB002 # 'magic number' lets bootloader find the header
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.set MB_CHECKSUM, -(MB_MAGIC + MB_FLAGS) #checksum of above, to prove we are multiboot
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.set PG_PRESENT, 1<<0
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.set PG_READ_WRITE, 1<<1
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.set PG_PAGE_SIZE, 1<<7
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.code32
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# Multiboot header
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.section .multiboot, "aw"
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.align 4
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.long MB_MAGIC
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.long MB_FLAGS
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.long MB_CHECKSUM
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.skip 20
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.long 0
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.long 800
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.long 600
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.long 32
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.section .bss, "aw", @nobits
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# Create stack
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stack_bottom:
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.skip 16384
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stack_top:
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.global g_kernel_cmdline
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g_kernel_cmdline:
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.skip 4096
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# Reserve memory for paging structures,
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# we will identity map first 4 MiB
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# 0 MiB -> 1 MiB: bootloader stuff
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# 1 MiB -> 2 MiB: kernel
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# 2 MiB -> 3 MiB: kmalloc
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# 3 MiB -> 4 MiB: kmalloc_eternal
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.align 4096
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boot_pml4:
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.skip 512 * 8
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boot_pdpt1:
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.skip 512 * 8
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boot_pd1:
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.skip 512 * 8
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.section .text, "a"
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.global g_multiboot_info
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g_multiboot_info:
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.skip 8
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.global g_multiboot_magic
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g_multiboot_magic:
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.skip 8
|
||||
|
||||
boot_gdt:
|
||||
.quad 0 // null
|
||||
.quad (1<<53) | (1<<47) | (1<<44) | (1<<43) // kernel code P,S,E,L (present, code/data, executable, long mode)
|
||||
boot_gdtr:
|
||||
.short . - boot_gdt - 1
|
||||
.quad boot_gdt
|
||||
|
||||
has_cpuid:
|
||||
pushfl
|
||||
pushfl
|
||||
xorl $0x00200000, (%esp)
|
||||
popfl
|
||||
pushfl
|
||||
popl %eax
|
||||
xorl (%esp), %eax
|
||||
popfl
|
||||
testl $0x00200000, %eax
|
||||
ret
|
||||
|
||||
is_64_bit:
|
||||
movl $0x80000000, %eax
|
||||
cpuid
|
||||
cmpl $0x80000001, %eax
|
||||
jl .no_extension
|
||||
movl $0x80000001, %eax
|
||||
cpuid
|
||||
testl $(1 << 29), %edx
|
||||
ret
|
||||
.no_extension:
|
||||
cmpl %eax, %eax
|
||||
ret
|
||||
|
||||
check_requirements:
|
||||
call has_cpuid
|
||||
jz .exit
|
||||
call is_64_bit
|
||||
jz .exit
|
||||
ret
|
||||
.exit:
|
||||
jmp system_halt
|
||||
|
||||
copy_kernel_commandline:
|
||||
pushl %esi
|
||||
pushl %edi
|
||||
movl g_multiboot_info, %esi
|
||||
addl $16, %esi
|
||||
movl (%esi), %esi
|
||||
movl $1024, %ecx
|
||||
movl $g_kernel_cmdline, %edi
|
||||
rep movsl
|
||||
popl %edi
|
||||
popl %esi
|
||||
ret
|
||||
|
||||
enable_sse:
|
||||
movl %cr0, %eax
|
||||
andw $0xFFFB, %ax
|
||||
orw $0x0002, %ax
|
||||
movl %eax, %cr0
|
||||
movl %cr4, %eax
|
||||
orw $0x0600, %ax
|
||||
movl %eax, %cr4
|
||||
ret
|
||||
|
||||
initialize_paging:
|
||||
# identity map first 4 MiB
|
||||
movl $(0x00000000 + PG_PAGE_SIZE + PG_READ_WRITE + PG_PRESENT), boot_pd1 + 0
|
||||
movl $(0x00200000 + PG_PAGE_SIZE + PG_READ_WRITE + PG_PRESENT), boot_pd1 + 8
|
||||
|
||||
# set pdpte1 and pml4e1
|
||||
movl $(boot_pd1 + PG_READ_WRITE + PG_PRESENT), boot_pdpt1
|
||||
movl $(boot_pdpt1 + PG_READ_WRITE + PG_PRESENT), boot_pml4
|
||||
|
||||
# enable PAE
|
||||
movl %cr4, %ecx
|
||||
orl $0x20, %ecx
|
||||
movl %ecx, %cr4
|
||||
|
||||
# set long mode enable bit
|
||||
movl $0x100, %eax
|
||||
movl $0x000, %edx
|
||||
movl $0xC0000080, %ecx
|
||||
wrmsr
|
||||
|
||||
# set address of paging structures
|
||||
movl $boot_pml4, %ecx
|
||||
movl %ecx, %cr3
|
||||
|
||||
# enable paging
|
||||
movl %cr0, %ecx
|
||||
orl $0x80000000, %ecx
|
||||
movl %ecx, %cr0
|
||||
|
||||
ret
|
||||
|
||||
.global _start
|
||||
.type _start, @function
|
||||
_start:
|
||||
# Initialize stack and multiboot info
|
||||
movl $stack_top, %esp
|
||||
movl %eax, g_multiboot_magic
|
||||
movl %ebx, g_multiboot_info
|
||||
|
||||
call copy_kernel_commandline
|
||||
call check_requirements
|
||||
call enable_sse
|
||||
|
||||
call initialize_paging
|
||||
|
||||
# flush gdt and jump to 64 bit
|
||||
lgdt boot_gdtr
|
||||
ljmpl $0x08, $long_mode
|
||||
|
||||
.code64
|
||||
long_mode:
|
||||
# clear segment registers
|
||||
movw $0x00, %ax
|
||||
movw %ax, %ss
|
||||
movw %ax, %ds
|
||||
movw %ax, %es
|
||||
movw %ax, %fs
|
||||
movw %ax, %gs
|
||||
|
||||
# call global constuctors
|
||||
call _init
|
||||
|
||||
# call to the kernel itself (clear ebp for stacktrace)
|
||||
xorq %rbp, %rbp
|
||||
call kernel_main
|
||||
|
||||
# call global destructors
|
||||
call _fini
|
||||
|
||||
system_halt:
|
||||
xchgw %bx, %bx
|
||||
cli
|
||||
1: hlt
|
||||
jmp 1b
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/* x86-64 crti.s */
|
||||
.section .init
|
||||
.global _init
|
||||
.type _init, @function
|
||||
_init:
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
/* gcc will nicely put the contents of crtbegin.o's .init section here. */
|
||||
|
||||
.section .fini
|
||||
.global _fini
|
||||
.type _fini, @function
|
||||
_fini:
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
/* gcc will nicely put the contents of crtbegin.o's .fini section here. */
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
/* x86-64 crtn.s */
|
||||
.section .init
|
||||
/* gcc will nicely put the contents of crtend.o's .init section here. */
|
||||
popq %rbp
|
||||
ret
|
||||
|
||||
.section .fini
|
||||
/* gcc will nicely put the contents of crtend.o's .fini section here. */
|
||||
popq %rbp
|
||||
ret
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
.macro pushaq
|
||||
pushq %rax
|
||||
pushq %rbx
|
||||
pushq %rcx
|
||||
pushq %rdx
|
||||
pushq %rbp
|
||||
pushq %rdi
|
||||
pushq %rsi
|
||||
pushq %r8
|
||||
pushq %r9
|
||||
pushq %r10
|
||||
pushq %r11
|
||||
pushq %r12
|
||||
pushq %r13
|
||||
pushq %r14
|
||||
pushq %r15
|
||||
.endm
|
||||
|
||||
.macro popaq
|
||||
popq %r15
|
||||
popq %r14
|
||||
popq %r13
|
||||
popq %r12
|
||||
popq %r11
|
||||
popq %r10
|
||||
popq %r9
|
||||
popq %r8
|
||||
popq %rsi
|
||||
popq %rdi
|
||||
popq %rbp
|
||||
popq %rdx
|
||||
popq %rcx
|
||||
popq %rbx
|
||||
popq %rax
|
||||
.endm
|
||||
|
||||
isr_stub:
|
||||
pushaq
|
||||
movq 120(%rsp), %rdi
|
||||
movq 128(%rsp), %rsi
|
||||
call cpp_isr_handler
|
||||
popaq
|
||||
addq $16, %rsp
|
||||
iretq
|
||||
|
||||
irq_stub:
|
||||
pushaq
|
||||
movq 120(%rsp), %rdi
|
||||
call cpp_irq_handler
|
||||
popaq
|
||||
addq $16, %rsp
|
||||
iretq
|
||||
|
||||
.macro isr n
|
||||
.global isr\n
|
||||
isr\n:
|
||||
cli
|
||||
pushq $0
|
||||
pushq $\n
|
||||
jmp isr_stub
|
||||
.endm
|
||||
|
||||
.macro isr_err n
|
||||
.global isr\n
|
||||
isr\n:
|
||||
cli
|
||||
pushq $\n
|
||||
jmp isr_stub
|
||||
.endm
|
||||
|
||||
.macro irq n
|
||||
.global irq\n
|
||||
irq\n:
|
||||
cli
|
||||
pushq $0
|
||||
pushq $\n
|
||||
jmp irq_stub
|
||||
.endm
|
||||
|
||||
isr 0
|
||||
isr 1
|
||||
isr 2
|
||||
isr 3
|
||||
isr 4
|
||||
isr 5
|
||||
isr 6
|
||||
isr 7
|
||||
isr_err 8
|
||||
isr 9
|
||||
isr_err 10
|
||||
isr_err 11
|
||||
isr_err 12
|
||||
isr_err 13
|
||||
isr_err 14
|
||||
isr 15
|
||||
isr 16
|
||||
isr_err 17
|
||||
isr 18
|
||||
isr 19
|
||||
isr 20
|
||||
isr 21
|
||||
isr 22
|
||||
isr 23
|
||||
isr 24
|
||||
isr 25
|
||||
isr 26
|
||||
isr 27
|
||||
isr 28
|
||||
isr 29
|
||||
isr 30
|
||||
isr 31
|
||||
|
||||
irq 0
|
||||
irq 1
|
||||
irq 2
|
||||
irq 3
|
||||
irq 4
|
||||
irq 5
|
||||
irq 6
|
||||
irq 7
|
||||
irq 8
|
||||
irq 9
|
||||
irq 10
|
||||
irq 11
|
||||
irq 12
|
||||
irq 13
|
||||
irq 14
|
||||
irq 15
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
ENTRY (_start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00100000;
|
||||
|
||||
.text BLOCK(4K) : ALIGN(4K)
|
||||
{
|
||||
*(.multiboot)
|
||||
*(.text)
|
||||
}
|
||||
.rodata BLOCK(4K) : ALIGN(4K)
|
||||
{
|
||||
*(.rodata)
|
||||
}
|
||||
.data BLOCK(4K) : ALIGN(4K)
|
||||
{
|
||||
*(.data)
|
||||
}
|
||||
.bss BLOCK(4K) : ALIGN(4K)
|
||||
{
|
||||
*(COMMON)
|
||||
*(.bss)
|
||||
}
|
||||
|
||||
g_kernel_end = .;
|
||||
}
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
KERNEL_ARCH_CFLAGS=-mcmodel=large -mno-red-zone -mno-mmx
|
||||
KERNEL_ARCH_CPPFLAGS=
|
||||
KERNEL_ARCH_LDFLAGS=-z max-page-size=4096
|
||||
KERNEL_ARCH_LIBS=
|
||||
|
||||
KERNEL_ARCH_OBJS= \
|
||||
$(ARCHDIR)/boot.o \
|
||||
$(ARCHDIR)/IDT.o \
|
||||
$(ARCHDIR)/MMU.o \
|
||||
$(ARCHDIR)/interrupts.o \
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
ARCH_CFLAGS=
|
||||
ARCH_CPPFLAGS=
|
||||
KERNEL_ARCH_CFLAGS=
|
||||
KERNEL_ARCH_CPPFLAGS=
|
||||
|
||||
ARCH_FREEOBJS=\
|
||||
|
||||
ARCH_HOSTEDOBJS=\
|
||||
Loading…
Reference in New Issue