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@@ -1,5 +1,6 @@
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#include <BAN/ScopeGuard.h>
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#include <kernel/ACPI/ACPI.h>
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#include <kernel/APIC.h>
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#include <kernel/IDT.h>
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#include <kernel/InterruptController.h>
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#include <kernel/Memory/PageTable.h>
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@@ -112,13 +113,13 @@ namespace Kernel
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static_assert(offsetof(HPETRegisters, timers[0]) == 0x100);
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static_assert(offsetof(HPETRegisters, timers[1]) == 0x120);
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BAN::ErrorOr<BAN::UniqPtr<HPET>> HPET::create(bool force_pic)
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BAN::ErrorOr<BAN::UniqPtr<HPET>> HPET::create()
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{
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HPET* hpet_ptr = new HPET();
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if (hpet_ptr == nullptr)
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return BAN::Error::from_errno(ENOMEM);
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auto hpet = BAN::UniqPtr<HPET>::adopt(hpet_ptr);
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TRY(hpet->initialize(force_pic));
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TRY(hpet->initialize());
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return hpet;
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}
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@@ -129,7 +130,7 @@ namespace Kernel
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m_mmio_base = 0;
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}
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BAN::ErrorOr<void> HPET::initialize(bool force_pic)
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BAN::ErrorOr<void> HPET::initialize()
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{
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auto* header = static_cast<const ACPI::HPET*>(ACPI::ACPI::get().get_header("HPET"_sv, 0));
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if (header == nullptr)
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@@ -138,7 +139,7 @@ namespace Kernel
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if (header->hardware_rev_id == 0)
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return BAN::Error::from_errno(EINVAL);
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if (force_pic && !header->legacy_replacement_irq_routing_cable)
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if (!InterruptController::get().is_using_apic() && !header->legacy_replacement_irq_routing_cable)
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{
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dwarnln("HPET doesn't support legacy mapping");
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return BAN::Error::from_errno(ENOTSUP);
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@@ -151,18 +152,19 @@ namespace Kernel
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auto& regs = registers();
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#if ARCH(x86_64)
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m_is_64bit = regs.capabilities & COUNT_SIZE_CAP;
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#else
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// spec: It is strongly recommended that 32-bit software only operate the timer in 32-bit mode.
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m_is_64bit = false;
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#endif
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// Disable and reset main counter
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regs.configuration.low = regs.configuration.low & ~ENABLE_CNF;
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regs.main_counter.high = 0;
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regs.main_counter.low = 0;
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// Enable legacy routing if available
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if (regs.capabilities & LEG_RT_CAP)
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regs.configuration.low = regs.configuration.low | LEG_RT_CNF;
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uint32_t period_fs = regs.counter_clk_period;
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const uint32_t period_fs = regs.counter_clk_period;
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if (period_fs == 0 || period_fs > HPET_PERIOD_MAX)
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{
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dwarnln("HPET: Invalid counter period");
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@@ -172,7 +174,7 @@ namespace Kernel
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m_ticks_per_s = FS_PER_S / period_fs;
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dprintln("HPET frequency {} Hz", m_ticks_per_s);
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uint8_t last_timer = (regs.capabilities & NUM_TIM_CAP_MASK) >> NUM_TIM_CAP_SHIFT;
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const uint8_t last_timer = (regs.capabilities & NUM_TIM_CAP_MASK) >> NUM_TIM_CAP_SHIFT;
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dprintln("HPET has {} timers", last_timer + 1);
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// Disable all timers
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@@ -191,8 +193,6 @@ namespace Kernel
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// enable interrupts
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timer0.configuration = timer0.configuration | Tn_INT_ENB_CNF;
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// clear interrupt mask (set irq to 0)
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timer0.configuration = timer0.configuration & ~Tn_INT_ROUTE_CNF_MASK;
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// edge triggered interrupts
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timer0.configuration = timer0.configuration & ~Tn_INT_TYPE_CNF;
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// periodic timer
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@@ -203,8 +203,43 @@ namespace Kernel
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if (timer0.configuration & Tn_FSB_INT_DEL_CAP)
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timer0.configuration = timer0.configuration & ~Tn_FSB_EN_CNF;
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uint16_t irq;
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if (header->legacy_replacement_irq_routing_cable)
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{
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TRY(InterruptController::get().reserve_irq(0));
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irq = 0;
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regs.configuration.low = regs.configuration.low | LEG_RT_CNF;
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timer0.configuration = timer0.configuration & ~Tn_INT_ROUTE_CNF_MASK;
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}
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else
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{
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ASSERT(InterruptController::get().is_using_apic());
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auto& apic = static_cast<APIC&>(InterruptController::get());
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uint8_t gsi = 0;
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for (; gsi < 32; gsi++)
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{
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if (!(timer0.int_route_cap & (1u << gsi)))
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continue;
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auto ret = apic.reserve_gsi(gsi);
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if (ret.is_error())
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continue;
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irq = ret.value();
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break;
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}
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if (gsi == 32)
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{
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dwarnln("Could not route any interrupt for HPET");
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return BAN::Error::from_errno(EFAULT);
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}
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regs.configuration.low = regs.configuration.low & ~LEG_RT_CNF;
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timer0.configuration = (timer0.configuration & ~Tn_INT_ROUTE_CNF_MASK) | (gsi << Tn_INT_ROUTE_CNF_SHIFT);
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}
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// set timer period to 1000 Hz
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uint64_t ticks_per_ms = m_ticks_per_s / 1000;
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const uint64_t ticks_per_ms = m_ticks_per_s / 1000;
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timer0.configuration = timer0.configuration | Tn_VAL_SET_CNF;
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timer0.comparator.low = ticks_per_ms;
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if (timer0.configuration & Tn_SIZE_CAP)
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@@ -221,9 +256,8 @@ namespace Kernel
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// enable main counter
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regs.configuration.low = regs.configuration.low | ENABLE_CNF;
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TRY(InterruptController::get().reserve_irq(0));
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set_irq(0);
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InterruptController::get().enable_irq(0);
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set_irq(irq);
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InterruptController::get().enable_irq(irq);
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return {};
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}
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@@ -240,36 +274,33 @@ namespace Kernel
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uint64_t HPET::read_main_counter() const
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{
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auto& regs = registers();
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const auto& regs = registers();
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if (m_is_64bit)
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return regs.main_counter.full;
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SpinLockGuard _(m_lock);
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uint32_t current_low = regs.main_counter.low;
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uint32_t wraps = m_32bit_wraps;
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if (current_low < (uint32_t)m_last_ticks)
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wraps++;
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return ((uint64_t)wraps << 32) | current_low;
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const uint32_t current_low = regs.main_counter.low;
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const uint32_t wraps = m_32bit_wraps + (current_low < static_cast<uint32_t>(m_last_ticks));
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return (static_cast<uint64_t>(wraps) << 32) | current_low;
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}
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void HPET::handle_irq()
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{
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{
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auto& regs = registers();
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const auto& regs = registers();
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SpinLockGuard _(m_lock);
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uint64_t current_ticks;
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if (m_is_64bit)
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current_ticks = regs.main_counter.full;
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m_last_ticks = regs.main_counter.full;
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else
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{
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uint32_t current_low = regs.main_counter.low;
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if (current_low < (uint32_t)m_last_ticks)
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const uint32_t current_low = regs.main_counter.low;
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if (current_low < static_cast<uint32_t>(m_last_ticks))
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m_32bit_wraps++;
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current_ticks = ((uint64_t)m_32bit_wraps << 32) | current_low;
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m_last_ticks = (static_cast<uint64_t>(m_32bit_wraps) << 32) | current_low;
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}
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m_last_ticks = current_ticks;
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}
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SystemTimer::get().update_tsc();
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@@ -280,25 +311,25 @@ namespace Kernel
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uint64_t HPET::ms_since_boot() const
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{
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auto current = time_since_boot();
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const auto current = time_since_boot();
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return current.tv_sec * 1'000 + current.tv_nsec / 1'000'000;
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}
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uint64_t HPET::ns_since_boot() const
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{
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auto current = time_since_boot();
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const auto current = time_since_boot();
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return current.tv_sec * 1'000'000'000 + current.tv_nsec;
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}
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timespec HPET::time_since_boot() const
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{
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auto& regs = registers();
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const auto& regs = registers();
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uint64_t counter = read_main_counter();
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uint64_t seconds = counter / m_ticks_per_s;
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uint64_t ticks_this_second = counter % m_ticks_per_s;
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const uint64_t counter = read_main_counter();
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const uint64_t seconds = counter / m_ticks_per_s;
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const uint64_t ticks_this_second = counter % m_ticks_per_s;
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long ns_this_second = ticks_this_second * regs.counter_clk_period / FS_PER_NS;
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const long ns_this_second = ticks_this_second * regs.counter_clk_period / FS_PER_NS;
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return timespec {
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.tv_sec = static_cast<time_t>(seconds),
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@@ -308,7 +339,7 @@ namespace Kernel
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void HPET::pre_scheduler_sleep_ns(uint64_t ns)
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{
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auto& regs = registers();
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const auto& regs = registers();
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const uint64_t target_ticks = BAN::Math::div_round_up<uint64_t>(ns * FS_PER_NS, regs.counter_clk_period);
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