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Kernel: Allow Processor compilation for i386 targets 

This is achieved by rewriting some inline assembly and changing
ProcessorID to be 32 bit value. For some reason if processor id
is 8 bits gcc runs out of 8 bit registers on i386.
This commit is contained in:
Bananymous 2024-03-22 13:33:13 +02:00
parent 0424082e7b
commit 7f029b2713
2 changed files with 19 additions and 18 deletions
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26
kernel/include/kernel/Processor.h
View File

@ -16,10 +16,10 @@ namespace Kernel
Enabled, Enabled,
}; };
using ProcessorID = uint8_t; using ProcessorID = uint32_t;
constexpr ProcessorID PROCESSOR_NONE = 0xFF; constexpr ProcessorID PROCESSOR_NONE = 0xFFFFFFFF;
#if ARCH(x86_64) #if ARCH(x86_64) || ARCH(i386)
class Processor class Processor
{ {
BAN_NON_COPYABLE(Processor); BAN_NON_COPYABLE(Processor);
@ -75,16 +75,16 @@ namespace Kernel
template<typename T> template<typename T>
static T read_gs_sized(uintptr_t offset) requires(sizeof(T) <= 8) static T read_gs_sized(uintptr_t offset) requires(sizeof(T) <= 8)
{ {
#define __ASM_INPUT(operation) operation " %%gs:%a[offset], %[result]" : [result]"=r"(result) : [offset]"ir"(offset) #define __ASM_INPUT(operation) asm volatile(operation " %%gs:%a[offset], %[result]" : [result]"=r"(result) : [offset]"ir"(offset))
T result; T result;
if constexpr(sizeof(T) == 8) if constexpr(sizeof(T) == 8)
asm volatile(__ASM_INPUT("movq")); __ASM_INPUT("movq");
if constexpr(sizeof(T) == 4) if constexpr(sizeof(T) == 4)
asm volatile(__ASM_INPUT("movl")); __ASM_INPUT("movl");
if constexpr(sizeof(T) == 2) if constexpr(sizeof(T) == 2)
asm volatile(__ASM_INPUT("movw")); __ASM_INPUT("movw");
if constexpr(sizeof(T) == 1) if constexpr(sizeof(T) == 1)
asm volatile(__ASM_INPUT("movb")); __ASM_INPUT("movb");
return result; return result;
#undef __ASM_INPUT #undef __ASM_INPUT
} }
@ -92,15 +92,15 @@ namespace Kernel
template<typename T> template<typename T>
static void write_gs_sized(uintptr_t offset, T value) requires(sizeof(T) <= 8) static void write_gs_sized(uintptr_t offset, T value) requires(sizeof(T) <= 8)
{ {
#define __ASM_INPUT(operation) operation " %[value], %%gs:%a[offset]" :: [value]"r"(value), [offset]"ir"(offset) : "memory" #define __ASM_INPUT(operation) asm volatile(operation " %[value], %%gs:%a[offset]" :: [value]"r"(value), [offset]"ir"(offset) : "memory")
if constexpr(sizeof(T) == 8) if constexpr(sizeof(T) == 8)
asm volatile(__ASM_INPUT("movq")); __ASM_INPUT("movq");
if constexpr(sizeof(T) == 4) if constexpr(sizeof(T) == 4)
asm volatile(__ASM_INPUT("movl")); __ASM_INPUT("movl");
if constexpr(sizeof(T) == 2) if constexpr(sizeof(T) == 2)
asm volatile(__ASM_INPUT("movw")); __ASM_INPUT("movw");
if constexpr(sizeof(T) == 1) if constexpr(sizeof(T) == 1)
asm volatile(__ASM_INPUT("movb")); __ASM_INPUT("movb");
#undef __ASM_INPUT #undef __ASM_INPUT
} }

11
kernel/kernel/Processor.cpp
View File

@ -13,14 +13,13 @@ namespace Kernel
static ProcessorID read_processor_id() static ProcessorID read_processor_id()
{ {
uint8_t id; uint32_t id;
asm volatile( asm volatile(
"movl $1, %%eax;" "movl $1, %%eax;"
"cpuid;" "cpuid;"
"shrl $24, %%ebx;" "shrl $24, %%ebx;"
"movb %%bl, %0;" : "=b"(id)
: "=rm"(id) :: "eax", "ecx", "edx"
:: "eax", "ebx", "ecx", "edx"
); );
return id; return id;
} }
@ -55,7 +54,9 @@ namespace Kernel
// set gs base to pointer to this processor // set gs base to pointer to this processor
uint64_t ptr = reinterpret_cast<uint64_t>(&processor); uint64_t ptr = reinterpret_cast<uint64_t>(&processor);
asm volatile("wrmsr" :: "d"(ptr >> 32), "a"(ptr), "c"(MSR_IA32_GS_BASE)); uint32_t ptr_hi = ptr >> 32;
uint32_t ptr_lo = ptr & 0xFFFFFFFF;
asm volatile("wrmsr" :: "d"(ptr_hi), "a"(ptr_lo), "c"(MSR_IA32_GS_BASE));
ASSERT(processor.m_gdt); ASSERT(processor.m_gdt);
processor.gdt().load(); processor.gdt().load();