Kernel: Set interval and average trb length on configure endpoint
Real controllers seem to require this while spec 4.8.2.4 says that they should be left as zero.
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@@ -10,13 +10,20 @@ namespace Kernel
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{
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enum class SpeedClass
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{
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None,
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LowSpeed,
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FullSpeed,
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HighSpeed,
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SuperSpeed,
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};
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enum class EndpointType
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{
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Control = 0b00,
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Isochronous = 0b01,
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Bulk = 0b10,
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Interrupt = 0b11,
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};
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enum class DeviceBaseClass : uint8_t
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{
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CommunicationAndCDCControl = 0x02,
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@@ -53,7 +53,9 @@ namespace Kernel
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};
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public:
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USBDevice() = default;
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USBDevice(USB::SpeedClass speed_class)
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: m_speed_class(speed_class)
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{}
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virtual ~USBDevice() = default;
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BAN::ErrorOr<void> initialize();
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@@ -72,6 +74,9 @@ namespace Kernel
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private:
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BAN::ErrorOr<ConfigurationDescriptor> parse_configuration(size_t index);
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protected:
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const USB::SpeedClass m_speed_class;
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private:
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DeviceDescriptor m_descriptor;
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BAN::UniqPtr<DMARegion> m_dma_buffer;
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@@ -43,11 +43,7 @@ namespace Kernel
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BAN::ErrorOr<void> initialize_control_endpoint() override;
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private:
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XHCIDevice(XHCIController& controller, uint32_t port_id, uint32_t slot_id)
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: m_controller(controller)
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, m_port_id(port_id)
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, m_slot_id(slot_id)
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{}
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XHCIDevice(XHCIController& controller, uint32_t port_id, uint32_t slot_id);
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~XHCIDevice();
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BAN::ErrorOr<void> update_actual_max_packet_size();
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@@ -55,6 +51,8 @@ namespace Kernel
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void advance_endpoint_enqueue(Endpoint&, bool chain);
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static uint64_t calculate_port_bits_per_second(XHCIController&, uint32_t port_id);
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private:
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static constexpr uint32_t m_transfer_ring_trb_count = PAGE_SIZE / sizeof(XHCI::TRB);
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