Kernel: All processors use LAPIC timer when running with APIC

This makes scheduler preemption much cleaner as bsb does not have to
send smp messages to notify other processes about timer interrupt.

Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using
before.
This commit is contained in:
2024-07-23 02:28:52 +03:00
parent 3e0150f847
commit 539afb329a
17 changed files with 224 additions and 73 deletions
+1 -18
View File
@@ -294,7 +294,7 @@ namespace Kernel
Processor::yield();
}
void Scheduler::preempt()
void Scheduler::timer_interrupt()
{
ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);
@@ -321,23 +321,6 @@ namespace Kernel
}
}
void Scheduler::timer_interrupt()
{
ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);
// FIXME: all processors should LAPIC for their preemption
if (Processor::is_smp_enabled())
{
ASSERT(Processor::current_is_bsb());
Processor::broadcast_smp_message({
.type = Processor::SMPMessage::Type::SchedulerPreemption,
.scheduler_preemption = 0 // dummy value
});
}
preempt();
}
void Scheduler::handle_unblock_request(const UnblockRequest& request)
{
ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);