Kernel: All processors use LAPIC timer when running with APIC
This makes scheduler preemption much cleaner as bsb does not have to send smp messages to notify other processes about timer interrupt. Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using before.
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@@ -294,7 +294,7 @@ namespace Kernel
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Processor::yield();
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}
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void Scheduler::preempt()
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void Scheduler::timer_interrupt()
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{
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ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);
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@@ -321,23 +321,6 @@ namespace Kernel
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}
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}
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void Scheduler::timer_interrupt()
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{
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ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);
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// FIXME: all processors should LAPIC for their preemption
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if (Processor::is_smp_enabled())
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{
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ASSERT(Processor::current_is_bsb());
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Processor::broadcast_smp_message({
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.type = Processor::SMPMessage::Type::SchedulerPreemption,
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.scheduler_preemption = 0 // dummy value
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});
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}
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preempt();
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}
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void Scheduler::handle_unblock_request(const UnblockRequest& request)
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{
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ASSERT(Processor::get_interrupt_state() == InterruptState::Disabled);
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