Kernel: All processors use LAPIC timer when running with APIC

This makes scheduler preemption much cleaner as bsb does not have to
send smp messages to notify other processes about timer interrupt.

Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using
before.
This commit is contained in:
2024-07-23 02:28:52 +03:00
parent 3e0150f847
commit 539afb329a
17 changed files with 224 additions and 73 deletions

View File

@@ -23,6 +23,8 @@ namespace Kernel
virtual void broadcast_ipi() override;
virtual void enable() override;
void initialize_timer();
private:
uint32_t read_from_local_apic(ptrdiff_t);
void write_to_local_apic(ptrdiff_t, uint32_t);
@@ -58,13 +60,14 @@ namespace Kernel
};
private:
SpinLock m_lock;
BAN::Vector<Processor> m_processors;
Kernel::paddr_t m_local_apic_paddr = 0;
Kernel::vaddr_t m_local_apic_vaddr = 0;
BAN::Vector<IOAPIC> m_io_apics;
uint8_t m_irq_overrides[0x100] {};
uint8_t m_reserved_gsis[0x100 / 8] {};
SpinLock m_lock;
BAN::Vector<Processor> m_processors;
Kernel::paddr_t m_local_apic_paddr = 0;
Kernel::vaddr_t m_local_apic_vaddr = 0;
BAN::Vector<IOAPIC> m_io_apics;
uint8_t m_irq_overrides[0x100] {};
uint8_t m_reserved_gsis[0x100 / 8] {};
uint64_t m_lapic_timer_frequency_hz { 0 };
};
}