Kernel: All processors use LAPIC timer when running with APIC
This makes scheduler preemption much cleaner as bsb does not have to send smp messages to notify other processes about timer interrupt. Also PIT percision is now "full" 0.8 us instead of 1 ms that I was using before.
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@@ -113,6 +113,23 @@ asm_ipi_handler:
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pop_userspace
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iret
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.global asm_timer_handler
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asm_timer_handler:
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push_userspace
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load_kernel_segments
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movl %esp, %ebp
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subl $15, %esp
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andl $0xFFFFFFF0, %esp
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call cpp_timer_handler
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movl %ebp, %esp
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pop_userspace
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iret
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.macro isr n
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.global isr\n
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isr\n:
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