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Kernel: Fix interrupt system

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I had not understood how MSIs work and I was unnecessarily routing them
through IOAPIC. This is not necessary and should not be done :D

Also MSIs were reserving interrupts that IOAPIC was capable of
generating. Now IOAPIC and MSIs use different set of interrupts so
IOAPIC can use more interrupts if needed.
This commit is contained in:
Bananymous
2024-09-27 15:31:31 +03:00
parent e4982a1a5c
commit 2d11ce9669
25 changed files with 618 additions and 199 deletions
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4
kernel/include/kernel/APIC.h
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@@ -60,13 +60,15 @@ namespace Kernel
};
private:
static constexpr uint8_t m_irq_count = IRQ_MSI_BASE - IRQ_VECTOR_BASE;
SpinLock m_lock;
BAN::Vector<Processor> m_processors;
Kernel::paddr_t m_local_apic_paddr = 0;
Kernel::vaddr_t m_local_apic_vaddr = 0;
BAN::Vector<IOAPIC> m_io_apics;
uint8_t m_irq_overrides[0x100] {};
uint8_t m_reserved_gsis[0x100 / 8] {};
uint8_t m_reserved_gsis[m_irq_count / 8] {};
uint64_t m_lapic_timer_frequency_hz { 0 };
};