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Kernel: Store current processor pointer in IA32_GS_BASE

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This allows easier access to processors fields
This commit is contained in:
Bananymous
2024-03-07 16:05:29 +02:00
parent efed67cbd0
commit 29fd682672
13 changed files with 119 additions and 98 deletions
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3
kernel/arch/x86_64/GDT.cpp
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@@ -18,9 +18,6 @@ namespace Kernel
gdt->write_entry(0x20, 0x00000000, 0xFFFFF, 0xF2, 0xC); // user data
gdt->write_tss();
gdt->flush_gdt();
gdt->flush_tss();
return gdt;
}

13
kernel/arch/x86_64/IDT.cpp
View File

@@ -356,7 +356,7 @@ done:
extern "C" void syscall_asm();
IDT* IDT::create()
IDT* IDT::create(bool is_bsb)
{
auto* idt = new IDT();
ASSERT(idt);
@@ -369,7 +369,7 @@ done:
// FIXME: distribute IRQs more evenly?
#define X(num) idt->register_interrupt_handler(IRQ_VECTOR_BASE + num, irq ## num);
if (Processor::current_is_bsb())
if (is_bsb)
{
IRQ_LIST_X
}
@@ -377,18 +377,15 @@ done:
idt->register_syscall_handler(0x80, syscall_asm);
idt->flush();
return idt;
}
[[noreturn]] void IDT::force_triple_fault()
{
// load 0 sized IDT and trigger an interrupt to force triple fault
auto& processor = Processor::current();
processor.set_interrupt_state(InterruptState::Disabled);
processor.idt().m_idtr.size = 0;
processor.idt().flush();
Processor::set_interrupt_state(InterruptState::Disabled);
Processor::idt().m_idtr.size = 0;
Processor::idt().load();
asm volatile("int $0x00");
ASSERT_NOT_REACHED();
}

2
kernel/arch/x86_64/PageTable.cpp
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@@ -312,7 +312,7 @@ namespace Kernel
{
SpinLockGuard _(m_lock);
asm volatile("movq %0, %%cr3" :: "r"(m_highest_paging_struct));
Processor::current().m_current_page_table = this;
Processor::set_current_page_table(this);
}
void PageTable::invalidate(vaddr_t vaddr)

9
kernel/arch/x86_64/boot.S
View File

@@ -158,13 +158,6 @@ enable_sse:
movl %eax, %cr4
ret
initialize_lapic_id:
movl $1, %eax
cpuid
shrl $24, %ebx
movw %bx, %gs
ret
initialize_paging:
# enable PAE
movl %cr4, %ecx
@@ -198,7 +191,6 @@ _start:
movl %ebx, V2P(bootloader_info)
movl $V2P(boot_stack_top), %esp
call initialize_lapic_id
call check_requirements
call enable_sse
@@ -278,7 +270,6 @@ ap_protected_mode:
movl ap_stack_ptr, %esp
movb $1, V2P(g_ap_stack_loaded)
call V2P(initialize_lapic_id)
call V2P(enable_sse)