Kernel: PCI cleanup PCI::Device API
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d2cfc843e4
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@ -92,10 +92,13 @@ namespace Kernel::PCI
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private:
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void enumerate_capabilites();
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void set_command_bits(uint16_t mask);
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void unset_command_bits(uint16_t mask);
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private:
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uint8_t m_bus;
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uint8_t m_dev;
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uint8_t m_func;
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const uint8_t m_bus;
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const uint8_t m_dev;
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const uint8_t m_func;
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uint8_t m_class_code;
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uint8_t m_subclass;
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@ -6,12 +6,20 @@
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#include <kernel/Storage/ATA/AHCI/Controller.h>
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#include <kernel/Storage/ATA/ATAController.h>
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#include <lai/helpers/pci.h>
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#define INVALID_VENDOR 0xFFFF
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#define MULTI_FUNCTION 0x80
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#define CONFIG_ADDRESS 0xCF8
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#define CONFIG_DATA 0xCFC
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#define PCI_REG_COMMAND 0x04
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#define PCI_CMD_IO_SPACE (1 << 0)
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#define PCI_CMD_MEM_SPACE (1 << 1)
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#define PCI_CMD_BUS_MASTER (1 << 2)
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#define PCI_CMD_INTERRUPT_DISABLE (1 << 10)
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#define DEBUG_PCI 1
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namespace Kernel::PCI
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@ -378,45 +386,54 @@ namespace Kernel::PCI
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}
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}
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void PCI::Device::set_command_bits(uint16_t mask)
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{
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write_dword(PCI_REG_COMMAND, read_dword(PCI_REG_COMMAND) | mask);
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}
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void PCI::Device::unset_command_bits(uint16_t mask)
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{
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write_dword(PCI_REG_COMMAND, read_dword(PCI_REG_COMMAND) & ~mask);
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}
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void PCI::Device::enable_bus_mastering()
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{
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write_dword(0x04, read_dword(0x04) | 1u << 2);
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set_command_bits(PCI_CMD_BUS_MASTER);
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}
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void PCI::Device::disable_bus_mastering()
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{
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write_dword(0x04, read_dword(0x04) & ~(1u << 2));
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unset_command_bits(PCI_CMD_BUS_MASTER);
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}
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void PCI::Device::enable_memory_space()
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{
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write_dword(0x04, read_dword(0x04) | 1u << 1);
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set_command_bits(PCI_CMD_MEM_SPACE);
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}
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void PCI::Device::disable_memory_space()
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{
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write_dword(0x04, read_dword(0x04) & ~(1u << 1));
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unset_command_bits(PCI_CMD_MEM_SPACE);
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}
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void PCI::Device::enable_io_space()
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{
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write_dword(0x04, read_dword(0x04) | 1u << 0);
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set_command_bits(PCI_CMD_IO_SPACE);
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}
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void PCI::Device::disable_io_space()
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{
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write_dword(0x04, read_dword(0x04) & ~(1u << 0));
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unset_command_bits(PCI_CMD_IO_SPACE);
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}
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void PCI::Device::enable_pin_interrupts()
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{
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write_dword(0x04, read_dword(0x04) | 1u << 10);
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unset_command_bits(PCI_CMD_INTERRUPT_DISABLE);
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}
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void PCI::Device::disable_pin_interrupts()
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{
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write_dword(0x04, read_dword(0x04) & ~(1u << 10));
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set_command_bits(PCI_CMD_INTERRUPT_DISABLE);
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}
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}
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