forked from Bananymous/banan-os
Bananymous
6ebd3a8aca
There was a lot of stuff wrong with this driver and it was only getting speeds of ~2.5 MB/s. Now 4K blocks get ~17 MB/s which is not good but definitely better. I'm pretty sure the issue is qemu's emulation as 85% of time is spent between sending the command and it to complete. Large blocks are now supported too, qemu with block size 1M gets around 600 MB/s read speeds.
134 lines
3.2 KiB
C++
134 lines
3.2 KiB
C++
#include <kernel/Memory/Heap.h>
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#include <kernel/Memory/PageTable.h>
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#include <kernel/Storage/ATA/AHCI/Controller.h>
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#include <kernel/Storage/ATA/AHCI/Definitions.h>
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#include <kernel/Storage/ATA/AHCI/Device.h>
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namespace Kernel
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{
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BAN::ErrorOr<BAN::RefPtr<AHCIController>> AHCIController::create(PCI::Device& pci_device)
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{
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auto* controller_ptr = new AHCIController(pci_device);
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if (controller_ptr == nullptr)
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return BAN::Error::from_errno(ENOMEM);
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auto controller = BAN::RefPtr<AHCIController>::adopt(controller_ptr);
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TRY(controller->initialize());
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return controller;
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}
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BAN::ErrorOr<void> AHCIController::initialize()
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{
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m_abar = TRY(m_pci_device.allocate_bar_region(5));
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if (m_abar->type() != PCI::BarType::MEM)
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{
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dprintln("ABAR not MMIO");
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return BAN::Error::from_errno(EINVAL);
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}
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auto& abar_mem = *(volatile HBAGeneralMemorySpace*)m_abar->vaddr();
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if (!(abar_mem.ghc & SATA_GHC_AHCI_ENABLE))
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{
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dprintln("Controller not in AHCI mode");
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return BAN::Error::from_errno(EINVAL);
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}
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// Enable interrupts and bus mastering
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m_pci_device.enable_bus_mastering();
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TRY(m_pci_device.reserve_interrupts(1));
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m_pci_device.enable_interrupt(0, *this);
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abar_mem.ghc = abar_mem.ghc | SATA_GHC_INTERRUPT_ENABLE;
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m_supports_64bit = !!(abar_mem.cap & (1u << 31));
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m_command_slot_count = ((abar_mem.cap >> 8) & 0x1F) + 1;
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uint32_t pi = abar_mem.pi;
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for (uint32_t i = 0; i < 32 && pi; i++, pi >>= 1)
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{
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// Verify we don't access abar outside of its bounds
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if (sizeof(HBAGeneralMemorySpace) + i * sizeof(HBAPortMemorySpace) > m_abar->size())
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break;
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if (!(pi & 1))
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continue;
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auto type = check_port_type(abar_mem.ports[i]);
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if (!type.has_value())
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continue;
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if (type.value() != AHCIPortType::SATA)
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{
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dprintln("Non-SATA devices not supported");
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continue;
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}
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auto device = AHCIDevice::create(this, &abar_mem.ports[i]);
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if (device.is_error())
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{
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dprintln("{}", device.error());
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continue;
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}
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m_devices[i] = device.value().ptr();
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if (auto ret = m_devices[i]->initialize(); ret.is_error())
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{
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dprintln("{}", ret.error());
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m_devices[i] = nullptr;
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}
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}
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return {};
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}
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AHCIController::~AHCIController()
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{
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}
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void AHCIController::handle_irq()
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{
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auto& abar_mem = *reinterpret_cast<volatile HBAGeneralMemorySpace*>(m_abar->vaddr());
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while (uint32_t is = abar_mem.is)
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{
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abar_mem.is = is;
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while (is != 0)
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{
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const size_t idx = __builtin_ctz(is);
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if (auto& device = m_devices[idx])
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device->handle_irq();
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else
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dwarnln("ignoring interrupt for port {}", idx);
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is &= ~(1u << idx);
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}
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}
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}
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BAN::Optional<AHCIPortType> AHCIController::check_port_type(volatile HBAPortMemorySpace& port)
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{
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const uint32_t ssts = port.ssts;
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const uint8_t ipm = (ssts >> 8) & 0x0F;
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const uint8_t det = (ssts >> 0) & 0x0F;
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if (det != HBA_PORT_DET_PRESENT)
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return {};
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if (ipm != HBA_PORT_IPM_ACTIVE)
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return {};
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switch (port.sig)
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{
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case SATA_SIG_ATA:
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return AHCIPortType::SATA;
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case SATA_SIG_ATAPI:
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return AHCIPortType::SATAPI;
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case SATA_SIG_PM:
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return AHCIPortType::PM;
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case SATA_SIG_SEMB:
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return AHCIPortType::SEMB;
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}
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return {};
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}
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}
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