forked from Bananymous/banan-os
368 lines
8.3 KiB
C++
368 lines
8.3 KiB
C++
#include <BAN/ScopeGuard.h>
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#include <kernel/Debug.h>
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#include <kernel/APIC.h>
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#include <kernel/CPUID.h>
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#include <kernel/IDT.h>
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#include <kernel/MMU.h>
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#include <string.h>
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#define LAPIC_EIO_REG 0xB0
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#define LAPIC_SIV_REG 0xF0
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#define LAPIC_IS_REG 0x100
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#define IOAPIC_MAX_REDIRS 0x01
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#define IOAPIC_REDIRS 0x10
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#define DEBUG_PRINT_PROCESSORS 0
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// https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#multiple-apic-description-table-madt-format
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static constexpr uint32_t RSPD_SIZE = 20;
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static constexpr uint32_t RSPDv2_SIZE = 36;
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struct RSDP
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{
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char signature[8];
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uint8_t checksum;
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char OEMID[6];
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uint8_t revision;
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uint32_t rsdt_address;
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uint32_t v2_length;
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uint64_t v2_xsdt_address;
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uint8_t v2_extended_checksum;
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uint8_t v2_reserved[3];
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} __attribute__ ((packed));
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struct SDTHeader
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{
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char signature[4];
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uint32_t length;
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uint8_t revision;
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uint8_t checksum;
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char OEMID[6];
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char OEM_table_id[8];
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uint32_t OEM_revision;
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uint32_t creator_id;
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uint32_t creator_revision;
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} __attribute__((packed));
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struct MADT
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{
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SDTHeader header;
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uint32_t local_apic;
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uint32_t flags;
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} __attribute__((packed));
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struct MADTEntry
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{
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uint8_t type;
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uint8_t length;
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union
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{
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struct
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{
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uint8_t acpi_processor_id;
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uint8_t apic_id;
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uint32_t flags;
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} __attribute__((packed)) entry0;
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struct
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{
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uint8_t ioapic_id;
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uint8_t reserved;
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uint32_t ioapic_address;
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uint32_t gsi_base;
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} __attribute__((packed)) entry1;
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struct
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{
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uint8_t bus_source;
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uint8_t irq_source;
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uint32_t gsi;
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uint16_t flags;
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} __attribute__((packed)) entry2;
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struct
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{
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uint16_t reserved;
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uint64_t address;
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} __attribute__((packed)) entry5;
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};
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} __attribute__((packed));
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union RedirectionEntry
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{
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struct
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{
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uint64_t vector : 8;
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uint64_t delivery_mode : 3;
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uint64_t destination_mode : 1;
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uint64_t delivery_status : 1;
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uint64_t pin_polarity : 1;
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uint64_t remote_irr : 1;
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uint64_t trigger_mode : 1;
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uint64_t mask : 1;
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uint64_t reserved : 39;
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uint64_t destination : 8;
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};
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struct
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{
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uint32_t lo_dword;
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uint32_t hi_dword;
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};
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};
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static bool is_rsdp(uintptr_t rsdp_addr)
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{
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const RSDP* rsdp = (const RSDP*)rsdp_addr;
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if (memcmp(rsdp->signature, "RSD PTR ", 8) != 0)
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return false;
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{
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uint8_t checksum = 0;
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for (uint32_t i = 0; i < RSPD_SIZE; i++)
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checksum += ((uint8_t*)rsdp)[i];
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if (checksum != 0)
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return false;
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}
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if (rsdp->revision == 2)
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{
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uint8_t checksum = 0;
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for (uint32_t i = 0; i < RSPDv2_SIZE; i++)
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checksum += ((uint8_t*)rsdp)[i];
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if (checksum != 0)
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return false;
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}
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return true;
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}
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static uintptr_t locate_rsdp()
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{
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// Look in main BIOS area below 1 MB
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for (uintptr_t addr = 0x000E0000; addr < 0x000FFFFF; addr += 16)
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if (is_rsdp(addr))
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return addr;
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return 0;
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}
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static bool is_valid_std_header(const SDTHeader* header)
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{
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uint8_t sum = 0;
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for (uint32_t i = 0; i < header->length; i++)
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sum += ((uint8_t*)header)[i];
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return sum == 0;
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}
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uintptr_t locate_madt(uintptr_t rsdp_addr)
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{
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uintptr_t entry_address_base = 0;
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uintptr_t entry_address_mask = 0;
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ptrdiff_t entry_pointer_size = 0;
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uint32_t entry_count = 0;
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const RSDP* rsdp = (const RSDP*)rsdp_addr;
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if (rsdp->revision == 2)
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{
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uintptr_t xsdt_addr = rsdp->v2_xsdt_address;
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MMU::get().allocate_page(xsdt_addr);
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entry_address_base = xsdt_addr + sizeof(SDTHeader);
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entry_address_mask = (uintptr_t)0xFFFFFFFFFFFFFFFF;
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entry_count = (((const SDTHeader*)xsdt_addr)->length - sizeof(SDTHeader)) / 8;
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entry_pointer_size = 8;
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MMU::get().unallocate_page(xsdt_addr);
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}
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else
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{
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uintptr_t rsdt_addr = rsdp->rsdt_address;
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MMU::get().allocate_page(rsdt_addr);
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entry_address_base = rsdt_addr + sizeof(SDTHeader);
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entry_address_mask = 0xFFFFFFFF;
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entry_count = (((const SDTHeader*)rsdt_addr)->length - sizeof(SDTHeader)) / 4;
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entry_pointer_size = 4;
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MMU::get().unallocate_page(rsdt_addr);
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}
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for (uint32_t i = 0; i < entry_count; i++)
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{
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uintptr_t entry_addr_ptr = entry_address_base + i * entry_pointer_size;
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MMU::get().allocate_page(entry_addr_ptr);
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uintptr_t entry_addr = *(uintptr_t*)entry_addr_ptr & entry_address_mask;
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MMU::get().allocate_page(entry_addr);
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BAN::ScopeGuard _([&]() {
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MMU::get().unallocate_page(entry_addr);
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MMU::get().unallocate_page(entry_addr_ptr);
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});
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const SDTHeader* entry = (const SDTHeader*)entry_addr;
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if (memcmp(entry->signature, "APIC", 4) == 0 && is_valid_std_header(entry))
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return entry_addr;
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}
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return 0;
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}
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APIC* APIC::create()
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{
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uint32_t ecx, edx;
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CPUID::get_features(ecx, edx);
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if (!(edx & CPUID::Features::EDX_APIC))
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{
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dprintln("Local APIC is not available");
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return nullptr;
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}
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uintptr_t rsdp_addr = locate_rsdp();
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if (!rsdp_addr)
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{
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dprintln("Could not locate RSDP");
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return nullptr;
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}
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uintptr_t madt_addr = locate_madt(rsdp_addr);
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if (!madt_addr)
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{
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dprintln("Could not find MADT in RSDP");
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return nullptr;
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}
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MMU::get().allocate_page(madt_addr);
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const MADT* madt = (const MADT*)madt_addr;
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APIC* apic = new APIC;
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apic->m_local_apic = madt->local_apic;
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for (uint32_t i = 0x00; i <= 0xFF; i++)
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apic->m_irq_overrides[i] = i;
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uintptr_t madt_entry_addr = (uintptr_t)madt + sizeof(MADT);
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while (madt_entry_addr < (uintptr_t)madt + madt->header.length)
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{
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const MADTEntry* entry = (const MADTEntry*)madt_entry_addr;
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switch (entry->type)
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{
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case 0:
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Processor processor;
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processor.processor_id = entry->entry0.acpi_processor_id;
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processor.apic_id = entry->entry0.apic_id;
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processor.flags = entry->entry0.flags & 0x03;
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MUST(apic->m_processors.push_back(processor));
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break;
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case 1:
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IOAPIC ioapic;
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ioapic.id = entry->entry1.ioapic_id;
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ioapic.address = entry->entry1.ioapic_address;
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ioapic.gsi_base = entry->entry1.gsi_base;
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ioapic.max_redirs = 0;
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MUST(apic->m_io_apics.push_back(ioapic));
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break;
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case 2:
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apic->m_irq_overrides[entry->entry2.irq_source] = entry->entry2.gsi;
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break;
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case 5:
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apic->m_local_apic = entry->entry5.address;
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break;
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default:
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dprintln("Unhandled madt entry, type {}", entry->type);
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break;
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}
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madt_entry_addr += entry->length;
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}
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MMU::get().unallocate_page((uintptr_t)madt);
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if (apic->m_local_apic == 0 || apic->m_io_apics.empty())
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{
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dprintln("MADT did not provide necessary information");
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delete apic;
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return nullptr;
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}
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MMU::get().allocate_page(apic->m_local_apic);
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for (auto& io_apic : apic->m_io_apics)
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{
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MMU::get().allocate_page(io_apic.address);
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io_apic.max_redirs = io_apic.read(IOAPIC_MAX_REDIRS);
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}
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// Mask all interrupts
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uint32_t sivr = apic->read_from_local_apic(LAPIC_SIV_REG);
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apic->write_to_local_apic(LAPIC_SIV_REG, sivr | 0x1FF);
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#if DEBUG_PRINT_PROCESSORS
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for (auto& processor : apic->m_processors)
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{
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dprintln("Processor{}", processor.processor_id);
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dprintln(" lapic id: {}", processor.apic_id);
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dprintln(" status: {}", (processor.flags & Processor::Flags::Enabled) ? "enabled" : (processor.flags & Processor::Flags::OnlineCapable) ? "can be enabled" : "disabled");
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}
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#endif
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return apic;
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}
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uint32_t APIC::read_from_local_apic(ptrdiff_t offset)
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{
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return *(uint32_t*)(m_local_apic + offset);
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}
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void APIC::write_to_local_apic(ptrdiff_t offset, uint32_t data)
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{
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*(uint32_t*)(m_local_apic + offset) = data;
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}
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uint32_t APIC::IOAPIC::read(uint8_t offset)
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{
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volatile uint32_t* ioapic = (volatile uint32_t*)address;
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ioapic[0] = offset;
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return ioapic[4];
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}
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void APIC::IOAPIC::write(uint8_t offset, uint32_t data)
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{
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volatile uint32_t* ioapic = (volatile uint32_t*)address;
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ioapic[0] = offset;
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ioapic[4] = data;
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}
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void APIC::eoi(uint8_t)
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{
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write_to_local_apic(LAPIC_EIO_REG, 0);
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}
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void APIC::enable_irq(uint8_t irq)
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{
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uint32_t gsi = m_irq_overrides[irq];
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IOAPIC* ioapic = nullptr;
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for (IOAPIC& io : m_io_apics)
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{
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if (io.gsi_base <= gsi && gsi <= io.gsi_base + io.max_redirs)
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{
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ioapic = &io;
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break;
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}
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}
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ASSERT(ioapic);
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RedirectionEntry redir;
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redir.lo_dword = ioapic->read(IOAPIC_REDIRS + gsi * 2);
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redir.hi_dword = ioapic->read(IOAPIC_REDIRS + gsi * 2 + 1);
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redir.vector = IRQ_VECTOR_BASE + irq;
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redir.mask = 0;
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redir.destination = m_processors.front().apic_id;
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ioapic->write(IOAPIC_REDIRS + gsi * 2, redir.lo_dword);
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ioapic->write(IOAPIC_REDIRS + gsi * 2 + 1, redir.hi_dword);
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}
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bool APIC::is_in_service(uint8_t irq)
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{
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uint32_t dword = (irq + IRQ_VECTOR_BASE) / 32;
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uint32_t bit = (irq + IRQ_VECTOR_BASE) % 32;
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uint32_t isr = read_from_local_apic(LAPIC_IS_REG + dword * 0x10);
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return isr & (1 << bit);
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} |